Memory Voltage Timing Circuit for Safe Polarity Switching
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Solution Overview
Problem
Integrated circuit memory systems face challenges in controlling voltage supply during polarity transitions, leading to excessive voltages across MOSFET devices, which can cause damage and affect the reliability of memory operations.
Innovation Solution
A timing control circuit is implemented using AND and OR gates with feedback loops and voltage selectors to manage the transition between positive and negative high voltages, ensuring that no MOSFET device is subjected to more than 5.5V during polarity transitions, by delaying the transitions of the voltage selectors to prevent simultaneous application of high voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If voltage transitions are applied simultaneously to both polarity lines, then the memory operation speed is improved, but excessive voltage exceeds MOSFET breakdown voltage causing device damage
Solution Approach 1:
The patent applies preliminary action by transitioning one polarity line to its target voltage level before transitioning the other polarity line. Specifically, when switching between polarities, the first polarity line is transitioned to its final voltage level first, and only after this transition is complete does the second polarity line begin its transition. This sequential approach ensures that at no point does the voltage difference across any MOSFET exceed the breakdown voltage threshold, while still maintaining efficient memory operation speed.
2Reliability
If voltage transitions are delayed sequentially to prevent excessive voltage, then MOSFET safety is improved, but the memory operation speed decreases
Solution Approach 1:
The patent implements dynamics by using control circuits that dynamically adjust the timing and sequencing of voltage transitions based on real-time system state. The control circuits monitor the voltage levels on both polarity lines and dynamically coordinate the transition timing to optimize both safety and speed. This dynamic control allows the system to achieve the fastest possible sequential transitions that still prevent MOSFET breakdown, rather than using fixed conservative delays.
3Object-affected harmful factors
If the voltage transition timing is tightly controlled, then excessive voltage is prevented, but the control circuit complexity increases
Solution Approach 1:
The patent employs feedback mechanisms where control circuits continuously monitor the voltage levels on both polarity lines and use this information to regulate the timing of voltage transitions. The control circuits receive feedback signals indicating the current voltage state and automatically adjust the transition timing accordingly. This feedback-based approach provides robust protection against excessive voltage while maintaining relatively simple control logic that can be implemented using standard digital control circuits.
Data Source
AI summary
A timing control circuit in an integrated circuit memory device. The circuit has an input line, a first output line and a second output line. The input line configured to receive a control signal for the timing control circuit to generate, a first selection input on the first output line and a second selection input on the second output line. In response to the control signal transitioning from a first state to a second state, the first selection input completes a first transition before the second selection input starts a second transition (e.g., for selection between 0V and −4.5V); and in response to the control signal transitioning from the second state to the first state, the second selection input completes a third transition before the first selection input starts fourth transition (e.g., for selection between 5V and 1.2V). The sequential transitions avoid simultaneous selection of 5V and −4.5V.