Memory Voltage Adjustment via Simultaneous Read Detection
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Solution Overview
Problem
In data processing systems that allow voltage scaling, reducing the operating voltage of memory arrays can lead to unreliable bit line differentials, causing false memory read results, which may go undetected until system failure, and this is particularly problematic as it can impact processor performance and energy consumption.
Innovation Solution
The implementation of detection circuitry that performs simultaneous read operations on memory cells to identify unreliable read results due to supply voltage levels, using a supplementary differential voltage detector in parallel with the primary detector to cross-check results and trigger error recovery by adjusting the supply voltage, thereby preventing erroneous data from being used in computations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the operating voltage of the memory array is reduced to save energy, then power consumption decreases, but the bit line differential becomes unreliable causing false read results
Solution Approach 1:
The patent implements a feedback mechanism where detection circuitry continuously monitors read results from the memory array. When unreliable read results are detected (indicating voltage is too low), the system automatically adjusts the supply voltage upward. This closed-loop feedback ensures that the memory operates at the lowest possible voltage while maintaining read reliability, thus resolving the contradiction between energy savings and reliability.
Solution Approach 2:
The system dynamically changes the supply voltage parameter based on detected read result quality. By adjusting the voltage level in response to detected errors, the system optimizes the trade-off between power consumption and reliability, allowing operation at lower voltages when conditions permit while ensuring reliability when voltage becomes too low.
2Use of energy by moving object
If voltage scaling is implemented to improve energy efficiency, then energy consumption reduces, but undetected false results may lead to system failure
Solution Approach 1:
The detection circuitry provides continuous feedback on read result validity, enabling the system to identify when voltage scaling is causing errors. This feedback mechanism prevents undetected errors from propagating through the system by triggering voltage adjustment or error handling procedures, thus eliminating the harmful effect of undetected false results while maintaining energy-efficient operation.
Solution Approach 2:
The system performs self-diagnosis through the detection circuitry that monitors its own read operations. By having the memory system detect its own errors, it can autonomously respond to voltage-related issues without external intervention, preventing harmful undetected errors while maintaining the benefits of voltage scaling for energy efficiency.
3Use of energy by moving object
If the supply voltage is adjusted downward to reduce power consumption, then energy efficiency improves, but the voltage difference detector may fail to correctly operation
Solution Approach 1:
The detection circuitry performs preliminary checks on read results before they are used by the processor. By detecting potential detection errors in advance, the system can prevent inaccurate voltage differential measurements from causing system failures, allowing aggressive voltage scaling while maintaining measurement integrity through pre-validation.
Solution Approach 2:
The system uses feedback from the detection circuitry to monitor the quality of voltage differential measurements. When measurement precision degrades due to low voltage, the feedback mechanism triggers voltage adjustment or error handling, ensuring that measurement accuracy is maintained despite power-saving voltage reductions.
Data Source
AI summary
A data processing system comprising a memory array having a plurality of memory cells and read circuitry for reading a logic value stored in one of the plurality of memory cells. The read circuitry is operable perform two substantially simultaneous reads of the stored logic value. A voltage controller is provided and is operable to selectively vary a level of a supply voltage to the memory array. Detection circuitry is provided for detecting, in dependence upon the two substantially simultaneous reads, when the supply voltage level causes the read result to be unreliable.