Semiconductor Memory Voltage Generator Temperature Compensation

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Solution Overview

Problem

Semiconductor memory devices face reduced read operation reliability due to temperature changes, as existing technologies do not effectively adjust control signals to compensate for temperature-induced changes in memory cell operation characteristics.

Innovation Solution

A semiconductor memory device is designed with a voltage generator that adjusts activation voltages of control signals based on temperature, using a temperature sensor to generate a temperature code and control the voltage levels of page buffer, sense amplifier, and current sensing signals, ensuring stable operation across temperature variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If activation voltages of control signals are kept constant, then device complexity is reduced, but read performance deteriorates due to temperature changes

Engineering Contradiction:
Improveread performanceVSAvoidvoltage control mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the activation voltage of control signals based on temperature. The voltage generator modifies the voltage level of control signals (such as page buffer sensing signal, sense amplifier sensing signal, and current sensing signal) according to temperature conditions, allowing the system to adapt to temperature-induced changes in memory cell characteristics without requiring complete redesign of the control architecture.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback through a temperature sensor that continuously monitors the temperature of the semiconductor memory device and provides temperature information to the voltage generator. This feedback loop enables the system to automatically adjust control signal voltages in response to temperature changes, maintaining optimal read performance across varying temperature conditions without manual intervention.

Inventive Principle:
Principle #23Feedback

2Reliability

If control signal voltages are adjusted for temperature compensation, then read reliability improves, but device complexity increases due to additional voltage control circuits

Engineering Contradiction:
Improveread operation reliabilityVSAvoidvoltage generator and temperature sensor
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling the semiconductor memory device to automatically monitor its own temperature and adjust its control signal voltages accordingly. The temperature sensor within the device detects temperature changes, and the voltage generator autonomously modifies the activation voltages of control signals based on this information, allowing the system to self-regulate without external control or additional complex circuitry.

Inventive Principle:
Principle #25Self-service

3Reliability

If temperature compensation is implemented, then read performance stability improves, but manufacturing complexity increases

Engineering Contradiction:
Improveread performance stabilityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies universality by designing the voltage generator to handle multiple control signals (page buffer sensing signal, sense amplifier sensing signal, current sensing signal) with a single temperature compensation mechanism. This multi-functional approach allows one circuit block to serve multiple purposes, adjusting different control signal voltages based on temperature without requiring separate compensation circuits for each signal, thereby simplifying the manufacturing process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11410736B2Semiconductor memory device
Publication Date: 2022.08.09 SK HYNIX INC
  • US11410736B2 patent drawing
  • US11410736B2 patent drawing
  • US11410736B2 patent drawing

AI summary

A semiconductor memory device includes a memory cell array, a page buffer, a control logic, and a voltage generator. The memory cell array includes memory cells. The page buffer is connected to the memory cells through a bit line and configure to read data of the memory cells. The control logic generates control signals for controlling the page buffer. The voltage generator generates activation voltages of the control signals. The page buffer includes a first transistor between the bit line and a first node, a second transistor between a power voltage and a second node, a third transistor between the first node and the second node, a fourth transistor between the second node and a third node, and a fifth transistor between the first node and the third node. The voltage generator controls a first control signal controlling the fifth transistor based on temperature of the semiconductor memory device.