Variable Resistance Memory Voltage Adjustment for Temperature Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory circuits face challenges in maintaining optimal access currents across a wide range of temperatures, leading to reduced performance and increased error rates during write and read operations due to changes in resistance values of variable resistance elements and selecting elements.
Innovation Solution
The proposed electronic device includes a semiconductor memory with a variable resistance element, a selecting element, and a voltage adjuster that adjusts back bias voltages and activation voltages based on temperature changes to optimize access currents, ensuring precise access operations regardless of temperature fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If access current is optimized for room temperature, then write and read operations are precise at normal temperatures, but performance degrades and error rates increase when temperature varies
Solution Approach 1:
The patent implements dynamic voltage adjustment by introducing a voltage adjuster that modifies back bias voltages and activation voltages based on real-time temperature sensing. The system transitions from static voltage optimization to dynamic adaptation, where control voltages are continuously adjusted according to temperature changes to maintain optimal access currents across varying thermal conditions.
Solution Approach 2:
The patent changes the electrical parameters (back bias voltage and activation voltage) of the selecting element in response to temperature variations. By adjusting these voltage parameters dynamically, the system compensates for temperature-induced resistance changes in both variable resistance elements and selecting elements, thereby maintaining stable access currents and operation accuracy across different temperature ranges.
2Device complexity
If fixed back bias voltage is applied to selecting elements, then circuit design is simplified, but access current optimization fails under temperature variations
Solution Approach 1:
The patent introduces a voltage adjuster as an intermediary component between the temperature sensor and the selecting elements. This mediator dynamically modifies the back bias voltages and activation voltages based on temperature feedback, enabling precise access current optimization without requiring complete redesign of the voltage control architecture. The voltage adjuster acts as a buffer that translates temperature variations into appropriate voltage adjustments.
3Reliability
If access current is increased to compensate for resistance changes, then operation reliability improves, but power consumption increases
Solution Approach 1:
Instead of uniformly increasing access current to compensate for resistance changes, the patent selectively adjusts voltage parameters (back bias voltage and activation voltage) of the selecting element. This parameter change approach modifies the electrical characteristics to maintain optimal access currents without requiring excessive current increase, thereby preserving operation reliability while minimizing additional power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures stable and accurate write and read operations by optimizing access currents and maintaining a sufficient process margin across varying temperatures, thereby enhancing the reliability and performance of memory circuits.
Implementation Method 1
a variable resistance element of which resistance value changes with a current flowing across the variable resistance element
Implementation Method 2
a voltage adjuster configured to adjust the voltage levels of back bias voltages of the selecting elements of the plurality of storage cells in accordance with a temperature change
Data Source
AI summary
Provided an electronic device including a semiconductor memory unit. The semiconductor memory unit includes: a plurality of storage cells each including a variable resistance element of which resistance is changed in response to a current flowing across the variable resistance element and a selecting element coupled to one end of the variable resistance element; a plurality of word lines corresponding to the respective storage cells and each coupled to a selecting element of a corresponding storage cell; a first line coupled to one ends of the plurality of storage cells; a second line coupled to the other ends of the plurality of storage cells; a voltage adjuster configured to adjust the voltage levels of back bias voltages of the selecting elements of the plurality of storage cells; and an access control unit electrically coupled to the first and second lines and passing an access current to a selected storage cell among the plurality of storage cells.