Nonvolatile Memory Device Programming Voltage Trimming
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Solution Overview
Problem
Existing nonvolatile semiconductor memory devices face challenges in efficiently controlling the threshold voltage of memory cells during programming and erasure operations, leading to variations in data storage accuracy and efficiency.
Innovation Solution
A nonvolatile semiconductor memory device with a circuit that adjusts the initial programming bias voltage by stepping up the voltage applied to memory cells after verification, using a parameter storage and calculation circuit to determine optimal voltage settings for each word line or block, ensuring accurate data programming and erasure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the voltage applied to memory cells is stepped up after each verification during programming, then data storage accuracy is improved, but programming time increases
Solution Approach 1:
The patent applies a preliminary high voltage (e.g., 20V) to the control gate before verification to ensure complete programming of memory cells. This preliminary action guarantees that all memory cells reach the desired threshold voltage state, improving data storage accuracy. The high voltage is applied once at the beginning rather than repeatedly during verification, thus avoiding excessive programming time while ensuring accurate data storage.
2Productivity
If the initial programming bias voltage is optimized for each word line, then programming efficiency is improved, but device complexity increases
Solution Approach 1:
The patent introduces a trimming circuit that can independently adjust the initial programming bias voltage for each word line or block based on its specific characteristics. This local quality adjustment allows optimization of programming efficiency for each region without requiring complex global control mechanisms. The trimming circuit modifies the bias voltage locally where needed, achieving high programming efficiency while keeping the overall device complexity manageable through targeted rather than universal adjustments.
3Reliability
If verification is performed repeatedly until successful programming, then data storage reliability is improved, but programming time increases
Solution Approach 1:
The patent applies a sufficiently high preliminary voltage to the control gate that ensures complete and reliable programming of all memory cells in the first attempt. This preliminary action eliminates the need for repeated verification cycles, as the initial programming pulse is strong enough to guarantee successful data storage. Consequently, data storage reliability is improved while programming time is minimized by avoiding iterative verification processes.
Data Source
AI summary
A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array including a plurality of word lines; a parameter storage part which stores a parameter related to a programming voltage which is applied to a word line for programming data; a word line selection circuit which selects a word line among the plurality of word lines which is connected to a memory cell to be programmed with data; a voltage application circuit which applies a programming voltage to the selected word line according to the parameter; a verify circuit which performs verification of programmed data; a control part which outputs a signal for selecting a word line and repeats the operations of the voltage application circuit until the verification is successful; a calculation circuit which calculates an average value of the number of times the control part repeats the operations of the voltage application circuit per each word line; and a parameter setting circuit which sets the parameter using the average value calculated.