Semiconductor Memory Device Multi-Plane Voltage Uniformity
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Solution Overview
Problem
Semiconductor memory devices face challenges in maintaining uniform operating voltage characteristics across multiple planes, leading to differences in performance during single plane and multi-plane operations, which affects the efficiency and speed of memory operations.
Innovation Solution
The semiconductor memory device incorporates a memory cell array with multiple planes, including normal and dummy blocks, where a peripheral circuit performs memory operations on selected normal blocks and dummy operations on unselected planes, ensuring uniform voltage characteristics by overlapping operation periods and controlling voltage application across all planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory operations are performed on multiple planes simultaneously without dummy operations, then operation speed increases, but operating voltage characteristics become non-uniform across planes
Solution Approach 1:
The patent creates a dummy block that copies the structure and voltage requirements of a normal block. By performing dummy operations on the dummy block in parallel with memory operations on normal blocks, the system maintains uniform voltage characteristics across all planes while achieving multi-plane operation speed. The dummy block serves as a replica that consumes similar resources without storing actual data.
2Stability of the object's composition
If dummy operations are performed on all unselected planes during single plane operation, then voltage uniformity is maintained, but device complexity increases
Solution Approach 1:
The patent segments the memory device into multiple planes, each containing both normal blocks for data storage and dummy blocks for voltage balancing. This segmentation allows independent control of dummy operations on specific planes without affecting the entire device structure. The dummy blocks are strategically placed within planes rather than requiring a complete duplicate of the entire memory structure.
Solution Approach 2:
The patent applies dummy operations locally to specific planes or blocks that require voltage balancing, rather than uniformly across the entire device. The control circuit selectively activates dummy blocks based on which planes are currently selected for operation, applying the dummy operation principle only where needed to maintain voltage uniformity without unnecessary complexity elsewhere.
3Productivity
If multi-plane operation is implemented without dummy blocks, then productivity increases, but voltage control stability deteriorates
Solution Approach 1:
The patent ensures continuous useful action by performing dummy operations on dummy blocks simultaneously with memory operations on normal blocks across multiple planes. This parallel execution maintains continuous voltage control activity on all planes, preventing voltage drift or instability that would occur if planes were left idle. The dummy operations provide continuous voltage regulation without interfering with actual data operations.
Data Source
AI summary
A semiconductor memory device includes a memory cell array and a peripheral circuit. The memory cell array includes at least two planes. The peripheral circuit performs a memory operation on a selected plane of the at least two planes during a single plane operation and performs a dummy operation on an unselected plane of the at least two planes.