Resistance Change Memory Well Biasing for Write Leakage Control

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Solution Overview

Problem

Conventional resistance change memories experience leakage currents in MOS transistors due to the application of write voltages, which affect well regions and increase power consumption.

Innovation Solution

A resistance change memory with a well potential adjustment unit that adjusts the well potential of MOS transistors based on write voltage, reducing leakage currents and power consumption by controlling the well potential during writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a write voltage is applied to a MOS transistor to perform writing of data, then data can be written to the resistance change element, but a leakage current flows in the well region increasing power consumption

Engineering Contradiction:
Improvewriting operationVSAvoidleakage current
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the well potential of the MOS transistor based on the write voltage level. When a write voltage is applied, the well potential is raised to match or exceed the write voltage, which suppresses the leakage current through the well region. This dynamic parameter adjustment allows the system to maintain high productivity in writing operations while significantly reducing energy loss from leakage currents.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the well potential is not adjusted during writing, then the structure remains simple, but leakage current increases and power consumption rises

Engineering Contradiction:
Improvewell potential control structureVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent implements feedback by using the write voltage itself as the control signal for adjusting the well potential. The well potential adjustment unit receives the write voltage and uses it to control the well potential, creating a self-regulating feedback mechanism. This approach reduces device complexity compared to external control systems while effectively suppressing leakage current and reducing power consumption.

Inventive Principle:
Principle #23Feedback

3Loss of energy

If the well potential is raised to suppress leakage current, then power consumption is reduced, but the complexity of controlling the well potential increases

Engineering Contradiction:
Improvepower consumptionVSAvoidwell potential adjustment mechanism
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling the write voltage to automatically control the well potential adjustment. The well potential adjustment unit uses the write voltage signal itself as the control input, allowing the system to self-regulate without requiring separate control circuits or external intervention. This self-service mechanism reduces the complexity of the control structure while achieving effective leakage current suppression and power consumption reduction.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12469538B2Resistance change memory, memory device, and memory system
Publication Date: 2025.11.11 SONY SEMICON SOLUTIONS CORP
  • US12469538B2 patent drawing
  • US12469538B2 patent drawing
  • US12469538B2 patent drawing

AI summary

A leakage current of a MOS transistor that performs writing is reduced. The resistance change memory includes a memory cell, a write drive unit, a write control unit, and a well potential adjustment unit. The memory cell includes a resistance change element. The write drive unit applies a write voltage to the memory cell to perform writing of data. The write control unit outputs a write control signal for controlling the writing to the write drive unit. The well potential adjustment unit adjusts a well potential of a well region in which an element constituting the write drive unit is arranged according to the write voltage at time of the writing.