3D Memory Word Line Discharge Timing Control
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Solution Overview
Problem
Memory devices with 2D structures are reaching their physical scaling limits, necessitating the development of 3D structures with vertically stacked memory cells, which require improved reliability and efficient programming operations to prevent over-programming and data integrity issues.
Innovation Solution
A memory device and method that involve controlling word lines to discharge at different times based on the completion status of programming operations, using a control logic to manage peripheral circuits for verify, program, and discharge operations, ensuring that word lines in completed and incomplete regions are discharged separately to prevent potential drops and maintain data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D structure with vertically stacked memory cells is used to overcome physical scaling limits, then storage capacity is improved, but programming reliability deteriorates due to potential over-programming and data integrity issues
Solution Approach 1:
The patent divides the word lines into multiple groups (first group, second group, third group) corresponding to different voltage regions. This segmentation allows independent control and discharge timing for each group, preventing over-programming in higher regions while maintaining programming efficiency in lower regions, thus resolving the reliability issue in 3D stacked memory structures
Solution Approach 2:
The patent applies preliminary discharge to the first group of word lines (lowest voltage region) before discharging the second and third groups. This preliminary action prevents potential drops in higher voltage regions during the programming process, ensuring data integrity and preventing over-programming while maintaining the high storage capacity of 3D structures
2Speed
If simultaneous discharge of all word lines is performed, then operation speed is improved, but data integrity deteriorates due to potential drops in higher voltage regions
Solution Approach 1:
The patent segments word lines into multiple groups with different discharge timings. The first group is discharged first, followed by the second group, and finally the third group. This segmented discharge approach prevents potential drops in higher voltage regions that would occur with simultaneous discharge, maintaining data integrity while preserving operational speed
Solution Approach 2:
The patent performs preliminary discharge on the first group of word lines before discharging other groups. This preliminary action stabilizes the voltage potential in lower regions first, preventing unwanted potential drops in higher regions during the programming operation, thereby ensuring data integrity without sacrificing operation speed
Data Source
AI summary
Provided herein may be a memory device and a method of operating the same. The memory device may include a memory block including a plurality of pages coupled to word lines, respectively, peripheral circuits configured to, during a program operation, perform program, verify, and discharge operations on memory cells coupled to a word line selected from among the word lines, and a control logic configured to control the peripheral circuits such that, during the discharge operation performed after the verify operation, word lines, included in a region in which the program operation has not completed, and word lines, included in a region in which the program operation has completed, among the word lines, are discharged at different times.