Semiconductor Memory Word Line Voltage Segmentation

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Solution Overview

Problem

Current semiconductor memory devices face challenges in reducing power consumption and ensuring reliability during erasing operations, particularly due to inefficiencies in voltage distribution across word lines, which can lead to erroneous data erasure and reduced device performance.

Innovation Solution

The semiconductor memory device employs a driver configuration that supplies different voltages to even and odd word lines during erasing operations, with the driver generating a higher voltage for even word lines and a reference voltage for odd word lines, optimizing voltage distribution and minimizing potential differences to enhance reliability and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a uniform voltage is supplied to all word lines during erasing operation, then the circuit configuration is simple, but power consumption increases and reliability decreases due to inefficient voltage distribution

Engineering Contradiction:
Improveerasing operation reliabilityVSAvoiddriver configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The word lines are segmented into even-numbered word lines and odd-numbered word lines, with each segment receiving different voltage levels during erasing operations. This segmentation allows optimized voltage distribution to improve erasing reliability while managing power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different segments of word lines based on their local positions (even or odd numbering). This local differentiation optimizes the erasing process for each segment, improving overall reliability while controlling power consumption.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If different voltages are supplied to even and odd word lines during erasing, then power consumption is reduced and reliability is improved, but the driver configuration becomes more complex

Engineering Contradiction:
Improvepower consumptionVSAvoiddriver configuration complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The driver is segmented into multiple drivers that can independently control voltage levels for even and odd word lines. This allows differentiated voltage supply to reduce power consumption while managing the complexity through modular driver design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The driver configuration dynamically adjusts voltage levels based on the operational mode (reading, writing, or erasing) and the specific word lines being accessed. This dynamic control optimizes power consumption while managing complexity through programmable voltage selection.

Inventive Principle:
Principle #15Dynamics

3Reliability

If voltage potential differences between adjacent word lines are minimized, then erroneous data erasure is reduced, but the voltage control precision requirements increase

Engineering Contradiction:
Improvedata erasure accuracyVSAvoidvoltage control precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Word lines are segmented into even and odd groups with controlled voltage potential differences between segments. This segmentation reduces voltage potential differences between adjacent word lines, minimizing erroneous data erasure while managing precision requirements through systematic voltage assignment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The voltage control system incorporates margin-based voltage assignment where voltage potential differences are pre-calculated and controlled to stay within safe margins. This beforehand cushioning prevents voltage-induced errors while providing a buffer against precision variations in voltage control.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20240304257A1Semiconductor memory device
Publication Date: 2024.09.12 KIOXIA CORP
  • US20240304257A1 patent drawing
  • US20240304257A1 patent drawing
  • US20240304257A1 patent drawing

AI summary

A semiconductor memory device includes first and second semiconductor pillars, a first string including first memory cells connected in series and a second string including second memory cells connected in series on opposite sides of the first semiconductor pillar, respectively, a third string including third memory cells connected in series and a fourth string including fourth memory cells connected in series, on opposite sides of the second semiconductor pillar, respectively, first word lines, second word lines, and a driver configured to supply different voltages to the first and second word lines during an erasing operation to erase data in the second and fourth memory cells. In the erasing operation, the driver supplies a first voltage higher than a reference voltage to the first word lines, and supplies the reference voltage to the second word lines.