3D Memory Word Line Segmentation for Leakage Current Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in preventing leakage currents while maintaining excellent electrical characteristics, particularly in memory cells with three-dimensional patterns.
Innovation Solution
The semiconductor device incorporates a word line driving circuit with specific transistor configurations and voltage control mechanisms to manage voltages across sub-word lines, ensuring different voltage levels are applied during active and standby states to minimize leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a three-dimensional pattern is used in memory cells, then integration and operating characteristics are improved, but leakage current increases
Solution Approach 1:
The word line is divided into three sub-word lines (first, second, and third sub-word lines) positioned at different heights. This segmentation allows independent voltage control of each sub-word line, enabling selective activation and reducing leakage current in inactive regions while maintaining the three-dimensional integrated structure.
Solution Approach 2:
Different voltage levels are applied to different sub-word lines based on their operational state. The first and third sub-word lines receive different voltages than the second sub-word line, dynamically adjusting electrical parameters to minimize leakage current while preserving the benefits of the three-dimensional memory cell architecture.
2Object-generated harmful factors
If multiple sub-word lines are used, then leakage current is reduced, but device complexity increases
Solution Approach 1:
The first and third sub-word lines serve dual functions: they act as control gates for the memory cell and simultaneously function as bit lines for data read/write operations. This multi-functionality reduces the need for separate dedicated bit lines, thereby limiting the increase in device complexity despite the addition of multiple sub-word lines.
Solution Approach 2:
The word line driving circuit integrates multiple control functions into a unified structure that manages all three sub-word lines. The first keeping transistor connects multiple sub-word lines together, merging control operations to simplify the overall device architecture while still achieving leakage current reduction through differential voltage application.
Data Source
AI summary
Disclosed is a semiconductor device which includes a substrate, a vertical pattern including a semiconductor region and extending in a direction perpendicular to one surface of the substrate, and a word line disposed in contact with a side surface of the vertical pattern and extending in a direction parallel to the one surface of the substrate. The word line may include a first sub-word line disposed adjacent to the substrate, a second sub-word line located above the first sub-word line, and a third sub-word line located above the second sub-word line.