Memory Device Wordline Ramp Control for Program Disturb Reduction

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Solution Overview

Problem

Conventional memory devices experience capacitance variations and charge leakage during programming operations, leading to increased program disturb events and prolonged page programming times due to inconsistent wordline ramping methods.

Innovation Solution

A memory device with controlled wordline ramp rates using a voltage regulator to simultaneously ramp selected and adjacent wordlines to desired voltages, eliminating floating of the selected wordline and reducing sensitivity to capacitance variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional wordline ramping methods are used, then memory devices can perform programming operations, but capacitance variations cause program disturb events and prolonged programming times

Engineering Contradiction:
Improveprogram disturb eventsVSAvoidpage programming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by ramping adjacent unselected wordlines to inhibit voltages before the selected wordline reaches its programming voltage. This preemptive措施 prevents charge leakage and program disturb events before they can occur, resolving the contradiction between reliability and programming time by preparing the memory device in advance for the programming operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously monitoring the voltages on selected and adjacent wordlines during programming operations and dynamically adjusting ramp rates accordingly. This feedback mechanism ensures that capacitance variations are compensated in real-time, reducing program disturb events while maintaining optimal programming speed, thus resolving the technical contradiction.

Inventive Principle:
Principle #23Feedback

2Device complexity

If selected wordline is floated during ramping, then voltage control is simplified, but sensitivity to capacitance variations increases

Engineering Contradiction:
Improvevoltage controlVSAvoidsensitivity to capacitance variations
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism by keeping the selected wordline continuously connected to the voltage regulator through a non-floating connection. This intermediary approach allows for stable voltage control while compensating for capacitance variations, resolving the contradiction between device complexity and reliability by adding controlled connectivity rather than simple floating.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies parameter changes by dynamically adjusting the ramp rate of the selected wordline based on real-time voltage monitoring and capacitance compensation. Instead of using a fixed floating connection, the system modifies the voltage application parameters adaptively, reducing sensitivity to capacitance variations while maintaining manageable voltage control complexity.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If adjacent unselected wordlines are not ramped to inhibit voltages, then device operation is simpler, but charge leakage increases

Engineering Contradiction:
Improvewordline ramping operationVSAvoidcharge leakage
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by ramping adjacent unselected wordlines to inhibit voltages before programming operations commence. This preemptive措施 prevents charge leakage by establishing proper voltage conditions in advance, resolving the contradiction between device complexity and energy loss by adding a preparatory step that pays off in reduced charge leakage during the actual programming operation.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces program disturb events and shortens page programming time, enhancing programming speed and minimizing charge leakage.

Implementation Method 1

ramping a selected wordline in the plurality of wordlines to a desired programming voltage while ramping one or more adjacent, unselected wordlines that are electrically coupled to the selected wordline to one or more desired inhibit voltages

Methodology Applied
Scientific EffectVoltage regulation:

Data Source

PatentUS20250266093A1Memory devices with controlled wordline ramp rates, and associated systems and methods
Publication Date: 2025.08.21 MICRON TECHNOLOGY INC
  • US20250266093A1 patent drawing
  • US20250266093A1 patent drawing
  • US20250266093A1 patent drawing

AI summary

Memory devices with controlled wordline ramp rates and associated systems and methods are disclosed herein. In one embodiment, a memory device includes at least one voltage regulator and a plurality of wordlines. The memory device is configured, during a programming operation of the memory region, to ramp a selected wordline to a desired programming voltage while ramping one or more adjacent, unselected wordlines electrically coupled to the selected wordline to desired inhibit voltage(s) using the at least one voltage regulator. In some embodiments, the memory device ramps the selected wordline and the one or more adjacent, unselected wordlines such that the one or more adjacent, unselected wordlines reach the desired inhibit voltage(s) upon the selected wordline reaching the desired programming voltage. In these and other embodiments, the memory device ramps the selected wordline to the desired programming voltage without floating the selected wordline.