Memory Write Data Selection Using DBI Bit Counting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face challenges in maintaining the number of data 1s per page below a predetermined level to reduce power consumption during data storage in memory cells.
Innovation Solution
A semiconductor memory device with a data transformation circuit that includes a DBI decoder, counter, inverter, indicator generation circuit, and data selection circuit to manage the number of 1s in data signals, using DBI encoding to invert bits and select appropriate write data based on an indicator signal to maintain power efficiency and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is stored in memory cells without controlling the number of 1s, then storage capacity is maximized, but power consumption increases
Solution Approach 1:
The data transformation circuit is segmented into distinct functional modules: a decoder to process input data and DBI signals, a counter to count 1s in the DBI signal, an indicator generation circuit to create selection signals, and a data selection circuit to choose between original and inverted data. This segmentation allows each module to perform a specific function efficiently, managing power consumption through targeted operations rather than processing entire data pages uniformly.
Solution Approach 2:
The system performs preliminary counting of 1s in the DBI signal before the actual data writing operation. The counter counts the number of 1s in advance, and the indicator generation circuit prepares the selection signal beforehand. This preliminary action allows the system to determine the optimal data representation (original or inverted) before committing to the write operation, thereby reducing power consumption proactively rather than reactively.
2Use of energy by moving object
If DBI encoding is applied to all data, then power consumption is reduced, but system stability deteriorates due to excessive 1s in stored data
Solution Approach 1:
The system employs feedback through the counter and indicator generation circuit that monitor the number of 1s in the DBI signal and provide selection signals accordingly. When the count indicates that inverting data would result in excessive 1s in the memory cell, the feedback mechanism prevents inversion, thereby maintaining system stability. This closed-loop control ensures that power consumption is reduced only when safe to do so.
Solution Approach 2:
The system dynamically changes the parameter of data representation (original vs. inverted) based on the counting result. Instead of applying a fixed inversion rule to all data, the system adjusts the data representation parameter conditionally: it inverts data to reduce power consumption when the 1s count is acceptable, but maintains the original representation when inversion would lead to excessive 1s. This conditional parameter change resolves the contradiction between power reduction and stability.
3Use of energy by moving object
If the number of 1s in write data is maintained below a predetermined level, then power consumption is reduced, but additional circuit components are required
Solution Approach 1:
The patent merges the DBI decoding function with the data transformation function into a unified data transformation circuit. The decoder, counter, indicator generation circuit, and data selection circuit work together as an integrated system that performs both DBI signal processing and power-optimized data selection. This merging reduces the need for separate, redundant circuit components while achieving the dual goals of power reduction and stability.
Solution Approach 2:
The data transformation circuit is designed with multi-functionality: it can process both DBI-encoded and non-DBI-encoded data, and it can selectively output either original or inverted data based on the 1s count. The same circuit infrastructure serves multiple purposes: decoding DBI signals, counting 1s, generating selection indicators, and performing data inversion when appropriate. This universality reduces the need for specialized components for each function.
Data Source
AI summary
A memory device is provided. A memory device comprises a decoder configured to receive first input data that is based on host data and a first data bus inversion (DBI) signal indicating whether the first input data is inverted, and output the host data, a counter configured to count a number of bits with a first value in the first DBI signal, an indicator generation circuit configured to generate an indicator signal based on a first counting value indicative of the number of bits with the first value in the first DBI signal, and a data selection circuit configured to receive the host data and, in response to the indicator signal, select write data to be stored in a memory cell array.