Memory Transistor Write Resume Using Dummy Verification
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Solution Overview
Problem
Semiconductor storage devices face challenges in speeding up write sequences without compromising reliability, particularly when write sequences are interrupted and resumed, due to increased resistance and capacitance in highly integrated devices.
Innovation Solution
The semiconductor storage device employs a strategy where a dummy verification operation corresponding to the last completed verification operation is executed after resumption of the write sequence, followed by the next verification operation, ensuring that a voltage equal to or higher than the verification voltage from the first verification operation is supplied to the word line before starting the next verification operation, thereby maintaining reliability and speeding up the write sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the write sequence is interrupted and resumed without executing a dummy verification operation, then the write speed is improved, but the reliability is reduced
Solution Approach 1:
The patent applies preliminary action by executing a dummy verification operation corresponding to the last completed verification operation before proceeding to the next verification operation after resumption. This preliminary dummy operation ensures that the word line voltage has stabilized to an appropriate level, preventing potential verification errors while minimizing the impact on write speed. The dummy operation is a preparatory step that addresses the voltage stabilization issue without requiring full verification procedures.
2Reliability
If multiple verification operations are executed in each write loop, then the reliability is improved, but the write speed is reduced
Solution Approach 1:
The patent applies the skipping principle by selectively executing only the necessary dummy verification operation after interruption, rather than repeating all verification operations. When the write sequence is resumed, the system rushes through the minimal required dummy operation to stabilize voltage, then immediately proceeds to the next verification operation, thereby maintaining reliability while minimizing the speed penalty.
3Productivity
If the word line voltage is not stabilized before verification operation after interruption, then the write speed is improved, but the measurement precision is reduced
Solution Approach 1:
The patent ensures measurement precision by performing preliminary voltage stabilization through the dummy verification operation before conducting the actual verification operation after resumption. This preliminary action allows the word line voltage to reach a stable state, ensuring accurate verification results without requiring excessive waiting time that would significantly slow down the write process.
Data Source
AI summary
A semiconductor storage device includes a memory transistor and a word line connected to a gate electrode of the memory transistor. When a write sequence is interrupted before a k+1th verification operation is ended after a kth verification operation is ended in the nth write loop of the write sequence, a voltage equal to or higher than a verification voltage corresponding to a first verification operation in the nth write loop is supplied to the word line before start of the k+1th verification operation after resumption of the write sequence. A time from the resumption of the write sequence to the start of the k+1th verification operation is shorter than a time from start of the first verification operation to end of the kth verification operation in the nth write loop.