External Nonvolatile Memory Write Protection During Power Interruptions

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Solution Overview

Problem

During data writing to external nonvolatile memory in electronic control devices, power supply interruptions can cause write protection signals to be interrupted, leading to garbled data due to unexpected power cuts or noise, especially when the power supply voltage changes or the microcomputer resets.

Innovation Solution

A nonvolatile memory writing device is designed where the write protect terminal is connected to the microcomputer's power supply, ensuring that the write protection is disabled even if the electrical signal is interrupted, using dedicated power supplies and capacitors to maintain power during data writing and employing decision circuits to manage noise and reset signals effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the write protect terminal is connected to the microcomputer's power supply, then write permission is maintained during power fluctuations, but the system becomes vulnerable to garbled data when power supply is interrupted

Engineering Contradiction:
Improvedata integrityVSAvoidpower supply interruption
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A dedicated power supply circuit is introduced as an intermediary between the main power supply and the write protect terminal. This intermediary power supply includes a capacitor that maintains voltage during main power interruptions, preventing garbled data while isolating the write protect function from direct power supply fluctuations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

A capacitor is connected to the write protect terminal to store electrical energy beforehand. When the main power supply is interrupted during data writing, this stored energy maintains the write protect signal at the appropriate level, cushioning against the harmful effect of power interruption and preventing data corruption.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Ease of operation

If the power supply is cut off during data writing to the external nonvolatile memory, then the microcomputer resets, but garbled data occurs due to write protection signal interruption

Engineering Contradiction:
Improvepower switch operationVSAvoiddata corruption
Core Design Contradiction:
Ease of operationVSLoss of information

Solution Approach 1:

The dedicated power supply circuit acts as a mediator that decouples the write protect terminal from the main power supply. When the user operates the power switch causing main power interruption, the intermediary circuit maintains the write protect signal, preventing data corruption while allowing normal power operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The capacitor in the dedicated power supply is charged beforehand during normal operation. When power interruption occurs during data writing, this pre-charged capacitor maintains the write protect terminal voltage, cushioning against the harmful effect and preventing garbled data even though the microcomputer resets.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Adaptability or versatility

If the write protection function is controlled by the microcomputer, then writing permission can be managed, but the system is sensitive to noise and reset signals that may interrupt the write protect signal

Engineering Contradiction:
Improvewrite control flexibilityVSAvoidnoise and reset signals
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The dedicated power supply circuit with capacitor serves as an intermediary that filters out noise and reset signals from affecting the write protect terminal. The capacitor's inherent filtering特性 blocks high-frequency noise and transient reset signals while allowing the DC control signal from the microcomputer to pass through, maintaining write control flexibility while reducing sensitivity to harmful electrical disturbances.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12190962B2Nonvolatile memory writing device
Publication Date: 2025.01.07 MITSUBISHI ELECTRIC CORP
  • US12190962B2 patent drawing
  • US12190962B2 patent drawing
  • US12190962B2 patent drawing

AI summary

In a nonvolatile memory writing device that writes writing data transmitted from the microcomputer to a nonvolatile memory provided outside the microcomputer, the nonvolatile memory is a nonvolatile memory in which writing is protected and the protection is disabled by an electric signal from the microcomputer to the write-protect terminal of the nonvolatile memory, the write-protect terminal is connected to the power supply of the microcomputer, and when the electric signal from the microcomputer to the write-protect terminal is interrupted, the protection is disabled, even when the data is interrupted due to a change in the power supply voltage, it is possible to prevent garbled date due to the write protection signal during the write period of the write data.