Nonvolatile Memory Write Pulse Stepping for Threshold Voltage Control
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Solution Overview
Problem
In nonvolatile semiconductor memory devices with charge storage layers, repeated write and erase operations lead to degradation of insulating films, causing electron and hole traps that affect data retention and write characteristics, especially in miniaturized cells and multi-value memory systems where precise threshold voltage control is required.
Innovation Solution
A nonvolatile semiconductor memory device design that includes a memory cell array with a charge storage layer and a control unit executing multiple write cycles, where the write pulse voltage is applied multiple times and stepped up incrementally during each cycle to ensure accurate data writing and verification, thereby minimizing the impact of traps in the insulating film.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If write and erase operations are performed repeatedly on memory cells, then data storage capacity is improved, but insulating film degradation occurs causing threshold voltage spread
Solution Approach 1:
The patent applies a preliminary high voltage to the bit line before the write pulse to ensure sufficient tunnel current flows during the write operation. This preliminary voltage setup compensates for voltage drops and ensures consistent threshold voltage programming even after repeated operations, preventing the threshold voltage spread caused by insulating film degradation.
2Quantity of substance
If miniaturization of memory cells is advanced, then storage density is improved, but threshold voltage control precision deteriorates due to trap effects
Solution Approach 1:
The patent dynamically adjusts the bit line voltage parameter based on the memory cell state and operation type. By changing the bit line voltage to appropriately high levels during write operations, sufficient tunnel current is ensured even in miniaturized cells where trap effects are more significant, thereby maintaining threshold voltage control precision despite reduced cell size.
3Duration of action of stationary object
If charges are retained in traps within degraded insulating film, then data retention is affected, but write characteristics are significantly impacted
Solution Approach 1:
The patent utilizes the existing trap structure in the insulating film by applying high bit line voltages that generate sufficient tunnel current to program charges directly into or out of traps during write operations. This approach converts the previously harmful trap effects into a useful mechanism for reliable write operations, ensuring that charges in traps contribute to the desired threshold voltage change rather than causing unpredictable behavior.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the spread of threshold voltage distribution width, preventing significant rises in threshold voltage and maintaining precise control, even in peculiar memory cells, thereby ensuring reliable data retention and accurate read operations.
Implementation Method 1
data write and erase is performed by a tunnel current from the semiconductor substrate or control gate due to a high electric field
Implementation Method 2
data write and erase is performed by a tunnel current from the semiconductor substrate or control gate due to a high electric field, or hot carriers generated from the semiconductor substrate
Data Source
AI summary
A nonvolatile semiconductor memory device according to an embodiment of the present invention includes: a memory cell array having a plurality of memory cells arranged therein, each of the memory cells having a charge storage layer and a control electrode; and a control unit configured to execute a write cycle multiple times, the write cycle including a write operation and a write verify operation, the write operation being an operation for applying a write pulse voltage multiple times to the control electrode selected for data write, and the write verify operation being an operation for determining whether data write is completed or not. During one time of the write operation, the control unit makes a voltage value of a finally applied write pulse voltage larger than a voltage value of an initially applied write pulse voltage.