Semiconductor Memory Device Write Suspend and Resume Mechanism
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Solution Overview
Problem
NAND flash memory devices face challenges in suspending and resuming write operations during read requests, leading to data reliability issues when the same page is being written and read, as the data read during a write operation is different from the intended write data.
Innovation Solution
The semiconductor memory device incorporates a mechanism to suspend write operations upon receiving a read command, allowing for accurate data transmission by using latch circuits to hold write data and read data separately, ensuring reliable read operations even during ongoing write processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write operations are suspended during read requests, then data reliability is improved, but operation complexity increases
Solution Approach 1:
The patent applies preliminary action by suspending write operations before read operations begin. When a read command is detected during a write operation, the controller pauses the write process, allows the read to complete with accurate data, then resumes the write. This prevents data corruption by ensuring reads always access stable, non-changing data states.
Solution Approach 2:
The patent implements dynamic operation management by making the write operation state changeable - it can be running, suspended, or resumed based on read requests. The controller dynamically adjusts the write operation status depending on whether a read command is received, allowing flexible handling of concurrent read-write scenarios while maintaining data integrity.
2Productivity
If write operations continue during read requests, then productivity is improved, but data reliability deteriorates
Solution Approach 1:
The patent maintains continuity of useful action by resuming write operations after they are suspended. Once the read operation completes, the write operation continues from where it left off, ensuring that data is eventually written without permanent interruption. This balances productivity by minimizing write suspension time while maintaining reliability during the suspension period.
Solution Approach 2:
The controller performs preliminary verification before resuming write operations, ensuring that the suspension and resumption process maintains data integrity. The system checks that the write operation can safely continue after the read completes, preventing any potential data corruption from the suspension-resumption cycle.
3Reliability
If latch circuits are used to hold data separately, then data reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by using separate latch circuits for different data states - one latch for write data and another for read data. This segmentation isolates the data paths, ensuring that write operations and read operations access different data buffers, thereby preventing data confusion and improving reliability despite increased circuit complexity.
Data Source
AI summary
A method of controlling a memory device includes receiving a write instruction, starting a write operation to a first address in response to the write instruction, receiving a first read instruction of the first address, suspending the write operation, applying a read voltage to a word line corresponding to the first address in a first read operation in response to the first read instruction, resuming the write operation after applying the read voltage, and outputting read data corresponding to the first address from a data register during a period starting at resuming the write operation and ending at completion of the write operation.