Semiconductor Memory Write Speed via Parallel Voltage Generation

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Solution Overview

Problem

Existing semiconductor memory apparatuses face inefficiencies in write operations due to prolonged completion times, as they require voltage supply sections to generate and stabilize voltages at target levels before completing the write process, leading to delayed data storage.

Innovation Solution

A semiconductor memory apparatus that includes a command processing block generating voltage start and write control signals, and a memory control block that electrically couples a memory block to a sense amplifier or applies a predetermined voltage in response to these signals, allowing simultaneous comparison and generation of memory voltage during a write operation, enabling faster data storage by applying memory voltages at preset levels based on input data comparison results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage supply sections generate and stabilize voltages at target levels before completing the write process, then voltage stability is ensured, but write operation completion time is prolonged

Engineering Contradiction:
Improvevoltage stabilityVSAvoidwrite operation completion time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by generating the memory voltage in advance during the read operation phase, before the write operation begins. The voltage supply unit generates the required voltage levels while the data comparison is being performed, so that when the write operation needs to apply voltage to the memory block, the voltage is already ready and stable, eliminating the waiting time that would otherwise be required for voltage generation and stabilization.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If voltage is applied to memory block after voltage stabilization, then data storage accuracy is improved, but write operation speed is reduced

Engineering Contradiction:
Improvedata storage accuracyVSAvoidwrite operation speed
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The patent implements continuity of useful action by overlapping the voltage generation process with the data comparison and write preparation processes. Instead of completing one operation fully before starting the next, the system continuously performs multiple operations in parallel: the voltage supply unit generates voltage during the read phase, the data comparison block compares data during voltage generation, and when the write operation begins, both the voltage and data comparison results are ready simultaneously, maintaining continuous productive activity without idle waiting periods.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9196328B2Semiconductor memory apparatus and operation method using the same
Publication Date: 2015.11.24 MIMIRIP LLC
  • US9196328B2 patent drawing
  • US9196328B2 patent drawing
  • US9196328B2 patent drawing

AI summary

A semiconductor memory apparatus includes a command processing block configured to generate a voltage generation start signal, a first write control signal, a second write control signal, a read signal, and an operation signal in response to a first control signal and a second control signal in a write operation, and a memory control block configured to electrically couple a memory block, which stores data, to a sense amplifier or apply a predetermined voltage to the memory block in response to the voltage generation start signal, the first write control signal, the second write control signal, the read signal, and the operation signal.