Semiconductor Memory Write Sequence Voltage Adjustment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in efficiently writing data to memory cells with multiple threshold voltage levels, leading to issues such as increased time required for write operations and potential data corruption due to voltage distribution variations.
Innovation Solution
A semiconductor memory device with a control unit that executes a write sequence involving multiple loops of program and verify operations, where the voltage applied to the select gate line is adjusted across loops to precisely set threshold voltages, utilizing both normal and quick pass write modes to optimize voltage increments and prevent data errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional write operation is used to write data to memory cells with multiple threshold voltage levels, then the write operation can be completed, but the time required for write operations increases
Solution Approach 1:
The write operation is segmented into multiple loops, where each loop writes data to a specific range of threshold voltage levels. The memory cells are divided into first memory cells (lower voltage range) and second memory cells (higher voltage range), allowing parallel processing of different voltage ranges in different loops, thereby reducing total write time while maintaining data accuracy
Solution Approach 2:
The select gate line voltage is dynamically adjusted across different loops to match the target threshold voltage range. In the first loop, a first voltage is applied to target lower threshold voltage levels, while in the second loop, a second (higher) voltage is applied to target higher threshold voltage levels. This dynamic voltage adjustment optimizes the write operation for each specific voltage range, reducing overall write time while ensuring precise threshold voltage setting
2Productivity
If high voltage is applied to the select gate line to quickly set threshold voltages, then write speed improves, but voltage distribution variations increase causing data corruption
Solution Approach 1:
Different voltage levels are applied to the select gate line depending on the target memory cell group. The first voltage level is used for memory cells targeting lower threshold voltage ranges, while the second voltage level is used for memory cells targeting higher threshold voltage ranges. This localized voltage adjustment ensures optimal write speed for each voltage range while preventing voltage distribution variations and data corruption
Solution Approach 2:
The control unit preliminarily determines the appropriate voltage level to apply to the select gate line based on the target threshold voltage range before executing the write operation. This preliminary voltage selection prevents excessive voltage application that could cause voltage distribution variations, thereby maintaining data reliability while achieving adequate write speed
3Reliability
If multiple loops with voltage adjustments are used to precisely set threshold voltages, then data reliability improves, but the complexity of the write sequence increases
Solution Approach 1:
Each loop includes a verify operation that reads back the written data to confirm successful programming. The control unit uses this feedback to determine whether to execute additional loops or terminate the write sequence. This feedback mechanism ensures precise threshold voltage setting while providing an automated control structure that manages the complexity of multi-loop operations
Data Source
AI summary
A semiconductor memory device according to an embodiment includes a plurality of strings each including a select transistor and a memory cell that can be set to any one of a plurality of different threshold voltages, a select gate line that is commonly connected to the select transistors of the plurality of strings, a plurality of bit lines that are individually connected to the plurality of strings, a word line that is commonly connected to the memory cells of the plurality of strings, and a control unit configured to execute a write sequence for repeatedly performing a plurality of loops each including a set of a program operation and a verify operation, and a voltage applied to the select gate line in the program operation of a last loop is lower than a voltage applied to the select gate line in the program operation of a first loop.