Non-volatile Memory Writing Circuit Programming Verification
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Solution Overview
Problem
Recent NAND flash memories face challenges in accurately determining programming verification due to increased pseudo-pass bits caused by transistor size deviations resulting from scaling, which limits accurate determination to 3 bits and is exacerbated by miniaturization, leading to inaccurate programming end detection.
Innovation Solution
A writing circuit for non-volatile memory apparatuses that includes a control circuit with specific MOS transistors and switches to control gate voltages, allowing for precise programming verification by setting gate voltages to a fixed value based on a reference current, thereby improving accuracy even with reduced transistor sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If transistor size is reduced due to scaling, then integration density is improved, but manufacturing precision deteriorates causing increased pseudo-pass bits
Solution Approach 1:
The patent changes the gate voltage parameter from a fixed value to a variable value that is added to the threshold voltage. This parameter change allows the determination circuit to compensate for transistor size deviations and maintain accurate programming verification despite manufacturing variations in scaled transistors.
2Device complexity
If gate voltage is set to fixed value, then circuit complexity is reduced, but measurement precision deteriorates in determining programming verification
Solution Approach 1:
The patent modifies the gate voltage from a fixed parameter to a variable parameter that includes an added voltage component. This enables the circuit to maintain simplicity while improving measurement precision through the voltage addition mechanism that compensates for transistor variations.
3Adaptability or versatility
If pseudo-pass bits increase beyond 3 bits, then adaptability is improved for error correction, but reliability deteriorates due to inaccurate programming end detection
Solution Approach 1:
The patent introduces a feedback mechanism where the determination circuit continuously monitors the programming verification status and uses the added voltage to compensate for deviations. This feedback loop enables accurate detection even when pseudo-pass bits exceed the conventional 3-bit limit, maintaining reliability while supporting enhanced error correction capacity.
Data Source
AI summary
A writing circuit for a non-volatile memory apparatus is provided. The non-volatile memory apparatus includes a control circuit determining that a programming process of each memory cell is finished when performing data writing. An on/off state of a first switch is controlled according to data stored by a memory component, wherein the memory component stores a programming verify status of the corresponding memory cell. A determination control MOS transistor performs a determination control on a programming validation. A second switch applies a voltage for controlling the determination control MOS transistor to a gate of the determination control MOS transistor according to a determination control signal and sets a gate voltage of the determination control MOS transistor to a voltage value equal to a threshold voltage of the determination control MOS transistor plus a predetermined control voltage value.