Semiconductor Memory ZQ Calibration Control Circuit

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Solution Overview

Problem

The existing zero quotient (ZQ) calibration method in semiconductor memory devices often disrupts data transfer during calibration, limiting its frequency due to the necessity of temporarily disabling the input/output circuit, which restricts high-speed data transfer when characteristics are out of range.

Innovation Solution

A semiconductor memory device with a ZQ calibration control circuit that dynamically adjusts the output impedance of the input/output circuit by comparing temperature information and executing calibration only when significant changes occur, thereby minimizing calibration time and preventing data transfer limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ZQ calibration is frequently executed to maintain proper characteristics, then the characteristics of the input/output circuit are kept within the appropriate range, but the data transfer is limited because the input/output circuit cannot be used during calibration

Engineering Contradiction:
Improvecharacteristics of input/output circuitVSAvoiddata transfer
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs ZQ calibration in advance during idle periods or low-activity windows before the input/output circuit is needed for data transfer. By proactively calibrating the circuit characteristics before they drift out of range, the system ensures reliability is maintained while minimizing disruption to subsequent data transfer operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic ZQ calibration at predetermined intervals rather than continuously or on-demand. This periodic approach balances the need to maintain circuit characteristics within specification while allowing data transfer to proceed uninterrupted during non-calibration periods, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #19Periodic action

2Manufacturing precision

If ZQ calibration is executed to correct impedance changes, then the impedance of the signal line is dynamically corrected, but the input/output circuit cannot be used during calibration

Engineering Contradiction:
Improveimpedance of signal lineVSAvoiddata transfer time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent incorporates feedback mechanisms that monitor circuit characteristics and trigger ZQ calibration only when impedance drift exceeds predetermined thresholds. This feedback-driven approach ensures precision is maintained by calibrating only when necessary, thereby minimizing the time lost to calibration operations while still correcting impedance changes when they occur.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts calibration timing and frequency based on changing operational parameters such as temperature, voltage, and usage patterns. By adapting the calibration schedule to actual parameter changes rather than using fixed intervals, the system maintains impedance precision while reducing unnecessary calibration events that would waste data transfer time.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10418112B2Semiconductor memory device
Publication Date: 2019.09.17 KIOXIA CORP
  • US10418112B2 patent drawing
  • US10418112B2 patent drawing
  • US10418112B2 patent drawing

AI summary

A semiconductor memory device includes a first circuit configured to process data received from and transmitted to an external controller, a second circuit configured to execute calibration on the first circuit, and a control circuit configured to control the second circuit to execute the calibration on the first circuit in response to a calibration command received from the external controller. In response to a first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit. In response to a second calibration command that is received after the first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit if a first condition is met and to not execute the calibration on the first circuit if the first condition is not met.