Memristor Array Signal Processing for EEG Decoding

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Solution Overview

Problem

Current electroencephalogram signal processing methods require large and power-hungry hardware systems due to software-based decoding, which is inefficient for real-time processing and integration.

Innovation Solution

A signal processing device comprising a receiver, a memristor array, and a classifier, where the memristor array applies signals to memristor units based on resistance value distribution to encode and output signals, reducing the need for additional analog-to-digital conversion and enabling compact, low-power processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If software-based decoding is used to process electroencephalogram signals, then signal processing capability is achieved, but hardware volume and power consumption increase significantly

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidhardware volume
Core Design Contradiction:
Ease of manufactureVSVolume of stationary object

Solution Approach 1:

The patent replaces software-based decoding with a hardware-based neural network decoding system using memristor arrays. The memristor array directly performs neural network operations through its resistance characteristics, eliminating the need for software processing on traditional processors. This substitution of computational approach dramatically reduces hardware volume while maintaining signal processing capability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses memristor resistance value distribution to copy and represent neural network weights and signal features. By encoding neural network parameters into the physical resistance states of memristors, the system achieves compact representation of complex processing logic without requiring large amounts of memory or storage hardware

Inventive Principle:
Principle #26Copying

2Ease of manufacture

If software-based decoding is used to process electroencephalogram signals, then signal processing capability is achieved, but power consumption increases significantly

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by stationary object

Solution Approach 1:

The patent replaces energy-intensive software decoding on traditional processors with low-power hardware-based neural network decoding using memristors. Memristors perform computations through passive resistance changes rather than active transistor switching, dramatically reducing power consumption while maintaining signal processing capability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The memristor array performs neural network decoding operations autonomously through its inherent resistance characteristics. The physical properties of memristors naturally implement neural network computations without requiring external control logic or additional processing power, enabling self-service operation with minimal energy input

Inventive Principle:
Principle #25Self-service

3Measurement precision

If traditional signal processing methods are used, then decoding accuracy is achieved, but processing speed for real-time applications is insufficient

Engineering Contradiction:
Improvedecoding accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent pre-trains the neural network model offline and encodes the trained weights into memristor resistance values before deployment. This preliminary action transfers complex computational work to the training phase, enabling the deployed system to perform rapid inference operations in real-time without sacrificing decoding accuracy

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces sequential software-based signal processing with parallel hardware-based neural network processing using memristor arrays. The parallel nature of resistive measurements across the memristor array enables simultaneous processing of multiple signal features, dramatically increasing processing speed while maintaining decoding accuracy

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for efficient classification of electroencephalogram signals with reduced hardware volume and power consumption, facilitating integration and real-time processing without the need for additional conversion components.

Implementation Method 1

the memristor array is configured to apply the first signal that has been received to at least one memristor unit in the plurality of memristor units and output a second signal based on a memristor resistance value distribution of the memristor array

Methodology Applied
Scientific EffectMemristor resistance value distribution: Electrical Resistance

Data Source

PatentUS11717227B2Signal processing device and signal processing method
Publication Date: 2023.08.08 TSINGHUA UNIVERSITY
  • US11717227B2 patent drawing
  • US11717227B2 patent drawing
  • US11717227B2 patent drawing

AI summary

A signal processing device and a signal processing method. The signal processing device includes a receiver, a memristor array and a classifier. The receiver is configured to receive a first signal. The memristor array includes a plurality of memristor units, each of the plurality of memristor units includes a memristor, and the memristor array is configured to apply the first signal that has been received to at least one memristor unit of the plurality of memristor units and output a second signal based on a memristor resistance value distribution of the memristor array. The classifier is configured to classify the second signal outputted from the memristor array to obtain a type of the first signal.