Memristor-Current Conveyor Artificial Neuron Unit

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Solution Overview

Problem

Current artificial neural networks face challenges in performance degradation due to serial computation in conventional architectures, high current consumption, complexity in implementation, and lack of accuracy in storing synaptic weights, particularly in large-scale systems.

Innovation Solution

The integration of a current conveyor with a memristor and an artificial neuron unit, where the memristor is connected to the input port of the current conveyor, and the output of the conveyor is connected to the input of the neuron, allowing for simultaneous application and reading of electrical signals to produce exciting or inhibiting synapses, leveraging the memristor's nonlinear resistance properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional computation architecture is used for neural networks, then implementation is straightforward, but performance degrades in large-scale networks due to serial computation

Engineering Contradiction:
Improvecomputation performanceVSAvoidarchitecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces conventional digital computation architecture with a neuromorphic architecture that mimics biological neural networks. This substitution enables parallel computation through analog circuits and memristors, dramatically improving computation performance for large-scale neural networks while maintaining implementability through standardized circuit designs.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent combines multiple functions into integrated neural network units that simultaneously perform computation, storage, and learning operations. By merging the computational units with memristive synapses in a unified architecture, the system achieves high-performance parallel processing without requiring separate memory and computation components.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If digital memory points or analog memory (capacitor or floating-gate transistor) is used to store synaptic weights, then information storage is achieved, but current consumption is high or implementation complexity increases or accuracy is insufficient

Engineering Contradiction:
Improvesynaptic weight storage accuracyVSAvoidimplementation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent employs memristors that possess intrinsic plasticity, enabling them to automatically adjust their resistance states based on voltage application without requiring external control circuits. This self-service capability provides accurate synaptic weight storage while eliminating the need for complex plasticity computation circuits, thereby reducing implementation complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent utilizes the continuous resistance variation property of memristors to represent synaptic weights with high precision. By changing the resistance parameter of the memristor in response to applied voltage, the system achieves accurate analog storage of synaptic weights without requiring complex digital memory structures.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If memristors are used as artificial synapses, then current consumption is reduced and device size is minimized, but the system requires modified neuron design to achieve exciting and inhibiting synapses

Engineering Contradiction:
Improvecurrent consumptionVSAvoidneuron design complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent introduces a current conveyor as an intermediary component between the memristor and the neuron. This mediator enables the memristor to function as both exciting and inhibiting synapse without requiring modification of the neuron design, thereby maintaining low current consumption while simplifying the overall system architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent designs the current conveyor to provide multi-functionality, enabling it to support both exciting and inhibiting synaptic behaviors through a single unified interface. This universal component allows the same neuron design to work with memristors configured for different synaptic types, reducing design complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration simplifies the use of memristors in neural networks, reducing current consumption and silicon surface area while enhancing the accuracy and efficiency of synaptic weight modification, enabling high-performance computation accelerators for complex tasks.

Implementation Method 1

This member comprises a non-volatile resistance which varies nonlinearly as a function of the applied voltage. When a voltage is applied to it, its resistance varies continuously and the device stores the resistance value once the voltage has disappeared.

Methodology Applied
Scientific EffectMemristor effect: Electrical Resistance

Implementation Method 2

at least one current conveyor connected to an input of the neuron, and at least one memristor connected to the current conveyor

Methodology Applied
Scientific EffectCurrent conveyor effect: Conduction (electrical)

Data Source

PatentUS10366326B2Unit having an artificial neuron and a memristor
Publication Date: 2019.07.30 INST POLYTECHN DE BORDEAUX
  • US10366326B2 patent drawing
  • US10366326B2 patent drawing
  • US10366326B2 patent drawing

AI summary

An artificial neuron unit comprising one artificial neuron having at least one output port and at least one input port, and one memristor having two terminals; said unit being characterized in that it also comprises at least one current conveyor having two input ports X and Y, and one output port Z; and in which said memristor is connected by one of its terminals to the input port X of said current conveyor, said current conveyor is connected by its output port Z to an input port of said artificial neuron and said artificial neuron is connected by one of its output ports to the input port Y of said current conveyor or to another of said terminals of said memristor.