Memristor Memory Cell Circuit for Non-Binary In-Memory Computing
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Solution Overview
Problem
Existing neural network implementations face a Von Neumann bottleneck due to spatial separation of memory and processor, leading to communication bottlenecks during training and task performance, particularly in deep neural networks, and current solutions are limited to binary neural networks.
Innovation Solution
A memory cell and electronic circuit design incorporating memristors and switches that allow for the implementation of any-value neural networks, enabling efficient multiplication and accumulation operations through memristor resistance value manipulation and measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If neural networks are implemented on CPUs or GPUs with spatially separated memory and processor, then general-purpose computing capability is achieved, but communication bottlenecks occur during training and task performance
Solution Approach 1:
The patent merges memory and computation functions by implementing memristive synapses that can store weights in memory while performing multiplication and accumulation operations directly in the memory array, eliminating the need for separate processor-memory communication during neural network operations
Solution Approach 2:
The patent introduces a dedicated neural network processing architecture that acts as an intermediary between traditional memory and processor, using memristive crossbar arrays to perform in-memory computing operations and reduce communication overhead
2Device complexity
If binary neural networks are used to reduce footprint, then device complexity is reduced, but the ability to implement non-binary neural networks is lost
Solution Approach 1:
The patent changes the operational parameters of memristive synapses to support multi-level resistance states, enabling the representation of non-binary weights while maintaining a compact device footprint through the inherent properties of memristor materials and programming methods
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables real-time, low-power neural network operations capable of handling non-binary neural networks, reducing the Von Neumann bottleneck and enhancing computational efficiency.
Implementation Method 1
A memristor is a passive electronic component. The name is a crossword formed from the two words memory and resistor. A memristor is a non-volatile memory component, the value of its electrical resistance changing with the application of a voltage for a certain period of time and remaining at this value in the absence of voltage.
Implementation Method 2
M primary switch(es), each connected in parallel to a respective memristor... the memory cell being configured for writing a respective value to at least one memristor via the opening of the or each primary switch in parallel with said at least one memristor
Implementation Method 3
the memory cell being configured to read a respective value in at least one memristor via the opening of the or each primary switch in parallel with said at least one memristor, the closing of the or each other possible primary switch, the opening of the secondary switch and measuring a corresponding electrical quantity between the two main terminals
Data Source
AI summary
A memory cell, includes first and second main terminals, an auxiliary terminal; M memristor(s) between the main terminals, M≥1; M primary switch(es), each in parallel with a memristor; and a secondary switch between the second main terminal and the auxiliary terminal. It is configured for writing to at least one memristor by opening each primary switch in parallel with the at least one memristor, closing each other primary switch, closing the secondary switch and applying a corresponding programming voltage between the first main terminal and the auxiliary terminal; and for reading at least one memristor by opening each primary switch in parallel with the at least one memristor, closing each other possible primary switch, opening the secondary switch and measuring a corresponding electrical quantity between the main terminals.