Memristor Neural Network Circuit With Periodic Offset Correction

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Solution Overview

Problem

Neural network circuits face challenges in reducing power consumption and circuit scale while maintaining calculation accuracy and signal processing speed, particularly due to the inefficiencies in applying bias voltages and correcting offsets in memristor-based systems.

Innovation Solution

The neural network circuit incorporates a lattice-shaped memristor storage portion, D/A converters, drive amplifiers, I/V conversion amplifiers, and A/D converters, with an offset correction mechanism that controls bias and reference voltages to optimize memristor operations, reducing bias current duration and correcting offsets efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If bias voltage is continuously applied to memristors for offset correction, then calculation accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvecalculation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic offset correction by controlling the bias application amplifier to apply bias voltage only at specific timing intervals rather than continuously. The controller activates the bias application amplifier during offset correction periods and deactivates it during normal operation, achieving both high calculation accuracy through regular offset correction and low power consumption by minimizing bias current duration.

Inventive Principle:
Principle #19Periodic action

2Measurement precision

If multiple separate circuits are used for bias application and offset correction, then correction accuracy is improved, but circuit scale increases

Engineering Contradiction:
Improvecorrection accuracyVSAvoidcircuit scale
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the bias application amplifier and offset correction amplifier into a single integrated circuit. The bias application amplifier is configured to output both bias voltages for normal operation and correction voltages for offset correction, eliminating the need for separate amplifier circuits while maintaining correction accuracy through controller-managed voltage output switching.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bias application amplifier is designed with multi-functionality to serve dual purposes: applying bias voltages during normal operation and applying correction voltages during offset correction. The amplifier responds to control signals from the controller to switch between these functions, reducing overall circuit scale while preserving correction accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If bias current duration is extended for thorough offset correction, then offset correction accuracy is improved, but power consumption increases

Engineering Contradiction:
Improveoffset correction accuracyVSAvoidbias current duration
Core Design Contradiction:
Measurement precisionVSDuration of action of moving object

Solution Approach 1:

The controller implements periodic offset correction by activating the bias application amplifier only during specific correction intervals rather than continuously. This periodic activation achieves thorough offset correction accuracy while minimizing bias current duration and associated power consumption by keeping the amplifier inactive during normal operation periods.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces power consumption and circuit scale while maintaining high calculation accuracy and signal processing speed by optimizing memristor operations through controlled bias voltage application and offset correction.

Implementation Method 1

an element having two terminals as a synapse, the element being nonvolatile and capable of varying a conductance value and being referred to as a memristor

Methodology Applied
Scientific EffectMemristor effect: Electrical Resistance

Implementation Method 2

a D/A converter that receives the data to apply a voltage signal

Methodology Applied
Scientific EffectDigital-to-analog conversion:

Implementation Method 3

a drive amplifier that receives the output signal of the D/A converter to apply the voltage signal to the voltage input terminal

Methodology Applied
Scientific EffectElectrical amplification:

Implementation Method 4

an I/V conversion amplifier connected with a current output terminal of the crossbar circuit, and converting a current flowing in the current output terminal into a voltage signal

Methodology Applied
Scientific EffectCurrent-to-voltage conversion:

Implementation Method 5

an A/D converter that A/D-converts the voltage signal converted by the I/V conversion amplifier

Methodology Applied
Scientific EffectAnalog-to-digital conversion:

Implementation Method 6

At least one of the drive amplifiers may be a bias application amplifier that may apply the bias voltage having an opposite polarity and a reference voltage

Methodology Applied
Scientific EffectVoltage biasing:

Data Source

PatentUS11403518B2Neural network circuit
Publication Date: 2022.08.02 DENSO CORP
  • US11403518B2 patent drawing
  • US11403518B2 patent drawing
  • US11403518B2 patent drawing

AI summary

A neural network circuit includes: a storage portion that includes memristors; D/A converters; drive amplifiers; I/V conversion amplifiers; A/D converters; and offset correctors. The offset corrector includes a first latch circuit, a second latch circuit, a subtractor that subtracts latch data, and a controller. In performing a bias setting operation, the controller controls a bias application amplifier to output the bias voltage, controls each of the D/A converters to cause the drive amplifier other than the bias application amplifier to output a reference voltage, and also cause the first latch circuit to latch the output data. In performing a normal operation, the controller controls the bias application amplifier to output the reference voltage, controls each of the D/A converters to cause the drive amplifier other than the bias application amplifier to output the signal voltage, and also cause the second latch circuit to latch the output data.