Memristor Ternary Content Addressable Memory Bit Cell

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Solution Overview

Problem

Conventional content addressable memories (CAMs) and ternary content addressable memories (TCAMs) face limitations in storage density, power consumption, and flexibility in search operations, particularly when using SRAMs or DRAMs as storage elements, and lack the ability to efficiently store wildcard values and perform wildcard searches.

Innovation Solution

The use of memristors as storage elements in TCAMs allows for non-volatile memory with higher storage density and lower power consumption, enabling the storage of three values including a wildcard value and supporting searches based on three criteria, including a wildcard criterion, through a bit cell circuit layout that uses fewer transistors and a resistive divider configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If SRAMs or DRAMs are used as storage elements in conventional CAMs and TCAMs, then the memory can perform read and search operations, but the storage density is limited and power consumption is high

Engineering Contradiction:
Improvestorage densityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent changes the physical state and material parameters of the storage element from conventional SRAM/DRAM transistors to memristors, which exhibit resistance changes based on applied voltage pulses. This parameter change enables non-volatile storage with higher density and lower power consumption, as memristors maintain their state without continuous power supply unlike volatile SRAM/DRAM

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If conventional bit cell layouts are used in TCAMs, then the memory can store three values including wildcard, but the manufacturing complexity and cost are high

Engineering Contradiction:
Improvewildcard storage capabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates redundant transistor components from the conventional TCAM bit cell layout. By using memristors to store multiple resistance states representing three values (0, 1, wildcard), the design removes unnecessary transistors that would otherwise be required to achieve the same ternary storage function, thereby simplifying manufacturing

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memristor serves multiple functions simultaneously: it acts as both the storage element and the switching element, replacing what would traditionally require separate transistors and storage cells. This multi-functionality reduces the overall component count and manufacturing complexity while maintaining the ability to store three distinct values

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If more transistors are used in the bit cell circuit layout to achieve TCAM functionality, then the memory can perform ternary searches, but the storage density decreases and manufacturing cost increases

Engineering Contradiction:
Improveternary search capabilityVSAvoidstorage density
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent merges the storage function and the switching function into a single memristor component. Instead of using separate transistors for switching and separate storage elements, the memristor's resistance state directly represents the stored value (0, 1, or wildcard) and its conductance naturally provides the switching behavior, thereby increasing storage density

Inventive Principle:
Principle #5Merging (Combining)

4Speed

If conventional CAM/TCAM designs are used, then the memory can perform search operations, but the speed and flexibility of search operations are limited

Engineering Contradiction:
Improvesearch operation speedVSAvoidsearch criterion flexibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic search capability by allowing the search criterion to be flexibly configured through control signals that can select between different search modes (exact match, wildcard match, prefix match). The memristor-based architecture enables rapid switching between different search criteria, improving both speed and flexibility of search operations

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a more densely packed memory array with reduced manufacturing complexity and cost, offering enhanced flexibility and speed in search operations while maintaining high storage capacity and low power usage.

Implementation Method 1

Each of the first and second memristors may be caused to change between a low resistance state and a high resistance state

Methodology Applied
Scientific EffectMemristance: Electrical Resistance

Implementation Method 2

The first memristor and the second memristor may form a resistive divider

Methodology Applied
Scientific EffectResistive divider: Electrical Resistance

Data Source

PatentUS9847132B1Ternary content addressable memories
Publication Date: 2017.12.19 HEWLETT PACKARD ENTERPRISE DEV LP
  • US9847132B1 patent drawing
  • US9847132B1 patent drawing
  • US9847132B1 patent drawing

AI summary

An example ternary content addressable memory. A bit cell of the memory may include first and second memristors, with a first terminal of the first memristor being connected to a first terminal of the second memristor via a node, a second terminal of the first memristor being switchably connected to a first data line, and a second terminal of the second memristor being switchably connected to a second data line. The bit cell may also include a match-line transistor that is connected between a first rail and a match line, with a gate of the match-line transistor being connected to the node.