MEMS CMOS Integration via Etching Stop Layer
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Solution Overview
Problem
Current MEMS devices are not easily integrated with standard MOS processes, such as CMOS, leading to high costs and performance issues due to separate packaging of MEMS and CMOS devices.
Innovation Solution
A MEMS device and fabrication process that are compatible with CMOS technology, utilizing a back-plate substrate with perforating holes, structural dielectric layers, and an etching stop layer to form a micro-machine diaphragm, allowing for compact integration with CMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MEMS devices are fabricated using separate processes from CMOS devices, then each device can be optimized independently, but the integration cost increases and performance decreases due to separate packaging
Solution Approach 1:
The patent merges MEMS and CMOS fabrication processes into a single integrated process flow. The MEMS device is fabricated on the same substrate as CMOS devices using compatible process steps including depositing structural dielectric layers, forming etching stop layers, and creating through-holes that serve both MEMS and CMOS structures. This eliminates the need for separate packaging and interconnection, directly resolving the contradiction between integration performance and manufacturing ease.
Solution Approach 2:
The patent employs universal process steps that serve multiple functions: the same dielectric layers and etching processes used for CMOS device fabrication are also used to create MEMS structures. The through-holes formed in the substrate serve both as electrical interconnections for CMOS devices and as structural elements for MEMS devices, allowing a single fabrication process to produce both device types with optimized performance and reduced cost.
2Ease of manufacture
If MEMS devices are packaged separately from CMOS ASIC chips, then each device can be manufactured independently, but the overall cost increases
Solution Approach 1:
The patent combines MEMS and CMOS devices into a single integrated package structure fabricated on the same substrate. The through-holes and dielectric layers are formed to accommodate both device types simultaneously, eliminating the need for separate packaging operations and reducing overall device complexity while maintaining independent manufacturing capability through standardized process modules.
3Ease of manufacture
If standard CMOS fabrication processes are used for MEMS devices, then process compatibility and cost are improved, but the ability to optimize MEMS-specific structures is reduced
Solution Approach 1:
The patent applies local quality by using standard CMOS process steps with locally optimized parameters for MEMS structures. The same deposition and etching processes are used, but with adjusted process conditions, layer thicknesses, and material compositions in specific regions to achieve MEMS-specific structural requirements while maintaining overall process compatibility with CMOS fabrication.
Solution Approach 2:
The patent utilizes parameter changes within standard CMOS processes to optimize MEMS structures. By adjusting process parameters such as deposition temperature, etch selectivity, layer thickness, and material composition in specific process steps, the patent achieves precise control over MEMS structural properties while using the same base process platform as CMOS devices.
Data Source
AI summary
A micro-electro-mechanical systems (MEMS) device includes a back-plate substrate, having an intended region formed with a plurality of perforating holes. A first structural dielectric layer, disposed on the back-plate substrate, wherein the dielectric layer having an opening above the intended region. An etching stop layer, disposed over the first structural dielectric layer. A second structural dielectric layer, formed over the back-plate substrate. The etching stop layer and the second structural dielectric layer form at least a part of a micro-machine diaphragm, and cover over the opening of the first structural dielectric layer to form a chamber between the micro-machine diaphragm and the back-plate substrate.