MEMS Device CMOS-Substrate Electrical Interconnect
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current wafer-level packaging technologies struggle to make direct electrical contact with the top-layer of MEMS devices, as they are typically electrically isolated from the CMOS layer, limiting their application in cases where MEMS handle or cap wafers require electrical connection.
Innovation Solution
A method and system for wafer-level packaging of MEMS devices using CMOS-side contact based on Shellcase or Through Silicon Via (TSV) processes, involving a MEMS substrate bonded to a CMOS substrate with a patterned conductive Device Layer, wedge-shaped openings, and conductive layers for electrical connection, allowing both CMOS-side and MEMS handle-side electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If current wafer-level packaging technologies are used to make direct contact to CMOS wafer metallization, then packaging size is minimized and cost is reduced, but electrical contact to the top-layer of MEMS cannot be achieved since it is electrically isolated from the CMOS
Solution Approach 1:
The patent introduces an intermediary conductive layer deposited on the MEMS handle or cap wafer that serves as a bridge between the electrically isolated MEMS top-layer and the CMOS metallization. This conductive intermediary enables electrical contact without requiring direct contact between CMOS and MEMS layers, thus resolving the contradiction between maintaining simple wafer-level packaging and achieving electrical contact capability.
2Adaptability or versatility
If a conductive layer is deposited onto the MEMS handle or cap wafer to enable electrical contact, then electrical connection is achieved, but the packaging process becomes more complex
Solution Approach 1:
The patent merges the deposition of the conductive layer with the existing wafer-level packaging process flow. The conductive layer is deposited as part of the standard packaging sequence, combining the electrical contact function with the packaging process rather than adding a separate, complex interconnection stage. This integration minimizes the increase in process complexity while achieving electrical contact capability.
3Adaptability or versatility
If Through Silicon Via (TSV) process is used to provide electrical connection through the substrate, then electrical contact is enabled, but manufacturing complexity and cost increase
Solution Approach 1:
Instead of creating complex TSV structures that go through the substrate to achieve electrical contact, the patent inverts the approach by depositing a conductive layer on the top surface of the MEMS handle or cap wafer. This surface-level conductive path achieves the same electrical connection function without requiring through-substrate vias, thereby simplifying the manufacturing process while maintaining electrical connectivity.
Data Source
AI summary
A MEMS device is disclosed. The MEMS device comprises a MEMS substrate and a CMOS substrate having a front surface, a back surface and one or more metallization layers. The front surface being bonded to the MEMS substrate. The MEMS device includes one or more conductive features on the back surface of the CMOS substrate and electrical connections between the one or more metallization layers and the one or more conductive features.


