MEMS Sandwich Membrane Buried in Metal Interconnect Levels

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Solution Overview

Problem

Current methods for fabricating integrated circuits (ICs) that integrate microelectromechanical systems (MEMS) devices with semiconductor devices are complex and lack efficient integration of MEMS devices with metal-oxide semiconductor (MOS) devices and metal interconnects, leading to increased process complexity and reduced miniaturization capabilities.

Innovation Solution

The integration of a MEMS device with a semiconductor device on the same substrate, featuring a sandwich membrane electrode between metal interconnect levels, utilizing different insulating materials like silicon nitride or silicon oxynitride, and a protection wall surrounding the MEMS region, simplifies the fabrication process by burying the MEMS device in the dielectric layer during the metal interconnect formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If MEMS devices are integrated with semiconductor devices using conventional methods, then device functionality is achieved, but fabrication process complexity increases

Engineering Contradiction:
Improveintegration capabilityVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the MEMS device fabrication process with the semiconductor device fabrication process into a single integrated flow. The sandwich membrane structure is formed using the same dielectric layers and processing steps as the metal interconnect, eliminating separate fabrication processes and reducing overall complexity while achieving full functionality of both MEMS and semiconductor devices on the same substrate

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The dielectric layers serve multiple functions simultaneously: they provide electrical insulation for the metal interconnect, form the sandwich membrane structure for the MEMS device, and enable both devices to share the same substrate and fabrication process. This multi-functionality reduces the number of separate process steps required

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Volume of moving object

If MEMS devices are miniaturized to meet product requirements, then device size is reduced, but fabrication precision requirements increase

Engineering Contradiction:
ImproveMEMS device sizeVSAvoidfabrication precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent uses parameter changes in the form of multiple dielectric layers with different material compositions and thicknesses to achieve precise control over the sandwich membrane structure. By varying the dielectric constants, thicknesses, and material properties of the individual layers, the membrane can be precisely engineered for miniaturized dimensions while maintaining the required fabrication precision through standard semiconductor processing techniques

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The sandwich membrane is segmented into multiple thin dielectric layers rather than a single thick layer. This segmentation allows each layer to be formed with standard fabrication precision, and the cumulative effect achieves the required miniaturization while maintaining manufacturability through conventional processing steps

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8642986B2Integrated circuit having microelectromechanical system device and method of fabricating the same
Publication Date: 2014.02.04 UNITED MICROELECTRONICS CORP
  • US8642986B2 patent drawing
  • US8642986B2 patent drawing
  • US8642986B2 patent drawing

AI summary

An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.