Merged Pillar Layout for Transverse Routing in IC Metallization
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Solution Overview
Problem
The resistance of metal layers in integrated circuits (ICs) affects power delivery efficiency, heat generation, and susceptibility to electromigration, and the routing of these layers impacts the routing of additional electrical connections to functional circuit elements.
Innovation Solution
The solution involves merging pairings of short pillar patterns into corresponding medium pillar patterns, which increases the vertical-separation distance between them, thereby complying with design rules and allowing for transverse routing while reducing routing resources and increasing wiring density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If short pillar patterns are used with small vertical-separation distance, then routing resources are consumed and wiring density is reduced, but design rules are violated and transverse routing is blocked
Solution Approach 1:
The patent merges multiple short pillar patterns into merged pillar structures that maintain the electrical connection function while increasing the vertical-separation distance. This combining approach allows the structure to satisfy both the design rule requirements (minimum vertical separation) and routing efficiency requirements (reduced routing resources) simultaneously
Solution Approach 2:
The patent transitions from two-dimensional pillar arrangements to three-dimensional merged pillar structures by forming pillars that extend through multiple metal layers. This dimensional change enables increased vertical separation in the layout plane while maintaining electrical connectivity through the stacked metal layers, resolving the contradiction between separation distance and routing efficiency
2Reliability
If metal layer routing is optimized for power delivery, then power delivery efficiency is improved, but routing of additional electrical connections is impacted
Solution Approach 1:
The merged pillar structures serve multiple functions simultaneously: they provide power delivery through the metal layers, maintain required vertical separation for design rule compliance, and create space for additional transverse routing. This multi-functionality resolves the contradiction by making the same structure adaptable to both power delivery optimization and routing flexibility requirements
Data Source
AI summary
A method (of generating a revised layout diagram of a conductive line structure for an IC) including: for a first set of pillar patterns that represents portions of an M(i) layer of metallization and where i is a non-negative number, the first set including first and second pillar patterns which extend in a first direction, are non-overlapping of each other with respect to the first direction, are aligned with each other and have a first distance of separation, determining a first distance of separation as between corresponding immediately adjacent members of the first set; recognizing that the first distance is less than a transverse routing (TVR) separation threshold for an M(i+j) layer of metallization, where j is an integer and j≥2; and increasing the first distance so as to become a second distance which is greater than the TVR separation threshold of the M(i+j) layer.