Mesh Lower Electrode Reservoir Capacitor for Noise Reduction

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Solution Overview

Problem

Conventional MOS-type capacitors in semiconductor devices have low electrostatic capacitance due to their reduced size, making them unsuitable as reservoir capacitors in highly integrated semiconductor devices, where noise reduction is essential.

Innovation Solution

A semiconductor device with a cylindrical or concaved lower electrode in the cell region and a meshed, checkered, matrix-type, or lattice-type lower electrode in the peripheral region is used as a reservoir capacitor, along with a MOS-type capacitor between the semiconductor substrate and the wiring layer, formed using titanium or a titanium nitride structure, to increase the dielectric film contact area and minimize capacitance deterioration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the size of MOS-type capacitor is reduced to increase integration degree, then device integration is improved, but electrostatic capacitance deteriorates

Engineering Contradiction:
Improveintegration degreeVSAvoidelectrostatic capacitance
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The invention transitions from a conventional planar capacitor structure to a three-dimensional structure where the lower electrode extends downward into the semiconductor substrate. This vertical extension into the depth dimension increases the effective capacitance area without increasing the planar footprint, thereby maintaining high integration while improving electrostatic capacitance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The lower electrode is nested within the semiconductor substrate, with part of the electrode structure embedded in the substrate volume. This nesting approach allows the capacitor to utilize the substrate space efficiently, increasing capacitance without occupying additional device area

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If MOS-type capacitor is used for highly integrated device, then device integration is improved, but noise reduction capability deteriorates

Engineering Contradiction:
Improveintegration degreeVSAvoidnoise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

By extending the lower electrode vertically into the substrate, the invention creates additional separation between the capacitor structure and surrounding noise-generating elements in the horizontal plane. This three-dimensional configuration provides better noise isolation while maintaining compact integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The extended lower electrode structure acts as an intermediary that couples the capacitor to the substrate in a way that provides both electrical connection and noise filtering. The increased contact area with the substrate enables better signal stabilization and noise reduction

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9093569B2Semiconductor device and method for manufacturing the same
Publication Date: 2015.07.28 SK HYNIX INC
  • US9093569B2 patent drawing
  • US9093569B2 patent drawing
  • US9093569B2 patent drawing

AI summary

In a semiconductor device and a method for manufacturing the same, a mesh shaped lower electrode of a peripheral region is used as a reservoir capacitor to increase the size of a region contacting a dielectric film, such that Cs deterioration is minimized. An exemplary semiconductor device may include a line-type storage node contact plug formed over a semiconductor substrate, a mesh shaped lower electrode formed over the storage node contact plug, and a dielectric film and an upper electrode formed over the lower electrode.