MESO Minority Gate Logic Using Multi-Phase Clocking

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Solution Overview

Problem

Existing spintronic logic devices, such as Magnetic Tunnel Junctions (MTJs), face challenges with high energy consumption, long switching times, and high write error rates due to the need for large write currents and voltages, as well as reliability issues related to tunneling current in spin filtering tunneling dielectrics like magnesium oxide (MgO).

Innovation Solution

The implementation of Magnetoelectric Spin Orbit (MESO) Logic devices that utilize a combination of physical phenomena for spin-to-charge and charge-to-spin conversion, including the inverse Rashba-Edelstein effect and magnetoelectric effects, to achieve unidirectional signal propagation and reduce back propagation of signals, employing a multi-phase clock to prevent current leakage and utilize transistors for power control, resulting in faster operation and lower switching energy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large write current and voltage are used to switch magnets in MTJs, then switching reliability is improved, but energy consumption increases and switching time increases

Engineering Contradiction:
Improvewrite error rateVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the switching mechanism from spin-transfer torque (current-driven) to magnetoelectric coupling (voltage-driven). By applying voltage to the magnetoelectric layer instead of passing large current through the MTJ, the patent achieves reliable magnet switching with significantly reduced energy consumption, directly resolving the contradiction between reliability and energy use

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/electrical spin-transfer torque mechanism with a magnetoelectric field coupling mechanism. The voltage-induced magnetization rotation in the magnetoelectric layer provides a more efficient means of switching magnets, eliminating the need for large write currents and reducing energy consumption while maintaining switching reliability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If large write current is used to switch magnets in MTJs, then switching reliability is improved, but switching speed decreases

Engineering Contradiction:
Improvewrite error rateVSAvoidswitching time
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent changes the driving parameter from current to voltage. Voltage-induced magnetization switching through magnetoelectric coupling occurs much faster than spin-transfer torque switching, achieving sub-nanosecond switching speeds while maintaining high reliability, thus resolving the contradiction between reliability and switching speed

Inventive Principle:
Principle #35Parameter changes

3Reliability

If spin filtering tunneling dielectric is used in MTJs, then spin polarization is achieved, but tunneling current causes reliability issues

Engineering Contradiction:
Improvedevice stabilityVSAvoidtunneling current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and eliminates the spin filtering tunneling dielectric layer from the device structure. By using magnetoelectric coupling for magnet switching instead of spin-polarized current through the dielectric, the patent removes the source of tunneling current and associated reliability issues while maintaining spin functionality through the magnetoelectric layer

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If unidirectional signal propagation is implemented to prevent back propagation, then signal integrity is improved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces asymmetry in the magnetoelectric device structure to enable unidirectional signal propagation. The asymmetric coupling between the magnetoelectric layer and adjacent magnets creates direction-dependent interaction, allowing signals to propagate in one direction while blocking backward propagation, thus achieving signal integrity without complex additional circuitry

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables high-speed operation with reduced energy consumption, achieving switching times of around 100 picoseconds and switching energies of 1-10 attojoules, while maintaining non-volatility and efficient power management in integrated circuits.

Implementation Method 1

utilize a combination of physical phenomena for spin-to-charge and charge-to-spin conversion, including the inverse Rashba-Edelstein effect

Methodology Applied
Scientific EffectInverse Rashba-Edelstein effect:

Implementation Method 2

utilize a combination of physical phenomena for spin-to-charge and charge-to-spin conversion, including the inverse Rashba-Edelstein effect and magnetoelectric effects

Methodology Applied
Scientific EffectMagnetoelectric effect: Magnetoelastic Effects

Data Source

PatentUS11387404B2Magnetoelectric spin orbit logic based minority gate
Publication Date: 2022.07.12 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US11387404B2 patent drawing
  • US11387404B2 patent drawing
  • US11387404B2 patent drawing

AI summary

An apparatus is provided which comprises one or more magnetoelectric spin orbit (MESO) minority gates with different peripheral complementary metal oxide semiconductor (CMOS) circuit techniques in the device layer including: (1) current mirroring, (2) complementary supply voltages, (3) asymmetrical transistor sizing, and (4) using transmission gates. These MESO minority gates use the multi-phase clock to prevent back propagation of current so that MESO gate can correctly process the input data.