Magnetoelectric Spin Orbit Logic Transistor with Spin Filter
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Solution Overview
Problem
Conventional Metal Oxide Semiconductor (MOS) Field Effect Transistors face limitations in down-scaling gate voltage due to thermal effects, and Tunneling Field Effect Transistors have high on/off ratios and integration challenges in CMOS process technology, while Magnetoelectric Spin Orbit Logic (MESO) devices require lower gate voltages for efficient operation.
Innovation Solution
A magnetoelectric spin orbit logic transistor with a spin filter is developed, utilizing a stack of transition metal dichalcogenides and magnetic insulators as source and drain regions, and a magneto-electric oxide as gate oxide, allowing for lower gate voltage operation and high ON/OFF ratios, compatible with CMOS process technology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional MOSFET is used, then device structure is simple and easy to manufacture, but gate voltage cannot be scaled down below thermal limit
Solution Approach 1:
The patent employs composite material structures including magnetic insulator layers (e.g., EuO, EuS), transition metal dichalcogenide layers (e.g., MoS2, MoSe2), and ferroelectric materials (e.g., Pb(Zr,Ti)O3) stacked together to form the transistor. This composite structure enables magnetoelectric coupling that allows gate voltage scaling below thermal limits while maintaining manufacturability through established thin-film deposition techniques.
Solution Approach 2:
The patent replaces the conventional electric field-based control mechanism in MOSFETs with a magnetoelectric coupling mechanism. The magnetic insulator layer mediates the interaction between electric field (from gate) and magnetic moment (in channel), enabling voltage control of current through magnetic moment alignment rather than direct electric field effect, thus achieving sub-thermal voltage operation.
2Ease of manufacture
If TFET is used, then gate voltage can be scaled down, but on/off ratio is high and integration in CMOS process is challenging
Solution Approach 1:
The patent designs the magnetoelectric transistor with a universal structure that can be integrated into CMOS processes. The magnetic insulator/transition metal dichalcogenide stack serves multiple functions: as the active channel, as the source/drain regions, and as the switching element. This multi-functionality simplifies the overall device structure and enables seamless integration with existing CMOS fabrication processes while maintaining high on/off ratios through magnetoelectric switching.
Solution Approach 2:
The patent introduces localized magnetic moments in the channel region through the magnetic insulator layer, creating spatially varying magnetic properties that enable high on/off ratio. The magnetic moment alignment in the channel region, controlled by the gate voltage through magnetoelectric coupling, provides localized control over carrier transport, achieving superior switching characteristics while remaining compatible with CMOS integration.
3Use of energy by moving object
If MESO device is used, then energy dissipation is reduced, but device has more than three terminals making integration challenging
Solution Approach 1:
The patent merges the gate control function with the magnetoelectric coupling function into a single three-terminal structure. The gate electrode applies electric field that couples through the magnetic insulator layer to control magnetic moment alignment in the channel, enabling voltage-controlled switching with only three terminals (source, drain, gate). This integration of functions maintains the low energy dissipation advantage of MESO devices while achieving standard three-terminal compatibility for easy integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The magnetoelectric spin orbit logic transistor achieves lower gate voltage operation (down to 100 mV) with high ON/OFF ratios, facilitating easier integration and reduced power consumption for logic computation, neuromorphic computing, and memory operations.
Implementation Method 1
MESO devices use magnetoelectric (ME) effect to manipulate magnetization (and associated spin of electrons in a material) by an applied electric field
Implementation Method 2
a stack of transition metal dichalcogenides and magnetic insulators as source and drain regions
Data Source
AI summary
An apparatus is provided which comprises: a first stack comprising a magnetic insulating material (MI such as, EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, or graphene; a second stack comprising an MI material and a TMD, wherein the first and second stacks are separated by an insulating material (e.g., oxide); a magnet (e.g., a ferromagnet or a paramagnet) adjacent to the TMDs of the first and second stacks, and also adjacent to the insulating material; and a magnetoelectric material (e.g., (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, or (SmBi)FeO3) adjacent to the magnet.