Metal Gate Cuts Using Multi-Pass Etching for Height Consistency
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Solution Overview
Problem
As integrated circuits scale downward in size, forming gate cuts with varying widths but similar heights poses challenges due to loading effects during etching, which can disrupt backside structures and interfere with processing.
Innovation Solution
Employing different plasma-based etching processes to form gate cuts of different widths, with the wider cuts etched for a shorter duration to maintain similar heights, using dielectric materials for isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single etching process is used to form gate cuts of different widths, then the process is simple, but the height control becomes poor due to loading effects
Solution Approach 1:
The patent divides the gate cut formation into multiple separate etching processes: a first etching process forms initial gate cuts, and a second etching process forms additional gate cuts. This segmentation allows each etching process to be optimized independently for its specific width requirements, thereby achieving consistent height control across gate cuts of different widths while maintaining process simplicity through modular fabrication steps.
2Length of stationary object
If longer etching duration is used to achieve sufficient depth, then the gate cuts reach required depth, but backside structures are disrupted
Solution Approach 1:
The patent performs preliminary actions by forming masking structures and sacrificial structures before the etching processes. These preliminary structures define precise etch boundaries and protect backside structures from damage. The masking structures are formed with specific patterns that guide the etching depth, ensuring that gate cuts reach the required depth without extending too deep and disrupting backside structures.
3Area of stationary object
If wider gate cuts are formed, then isolation is improved, but the etching depth becomes excessive relative to the width
Solution Approach 1:
The patent applies local quality by using different etching parameters and masking structures for different gate cut locations. Wider gate cuts are formed with etching conditions optimized for their specific width, while narrower gate cuts use different conditions. This localized optimization ensures that each gate cut achieves the appropriate height-to-width ratio for its specific width, preventing excessive depth relative to width while maintaining effective isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves gate cuts with controlled depth and width ratios, ensuring consistent height across varying widths, thereby maintaining structural integrity and facilitating efficient backside processing.
Implementation Method 1
Employing different plasma-based etching processes to form gate cuts of different widths
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 2C~2D
AI summary
Techniques are provided herein to form semiconductor devices that include gate cuts with different widths (e.g., at least a 1.5x difference in width) but substantially the same height (e.g., less than 5 nm difference in height). A given gate structure extending over one or more semiconductor regions may be interrupted with any number of gate cuts that each extend through an entire thickness of the gate structure. According to some embodiments, gate cuts of a similar first width are formed via a first etching process while gate cuts of a similar second width that is greater than the first width are formed via a second etching process that is different from the first etching process. Using different etch processes for gate cuts of different widths maintains a similar height for the gate cuts of different widths.