Metal Gate Structure with Silicon Work Function Layer
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Solution Overview
Problem
Conventional semiconductor manufacturing methods face challenges with current leakage due to tunneling effects and inferior polysilicon gate performance, particularly in achieving optimal work functions for P-type MOS devices with reduced equivalent oxide thickness (EOT) using high-k gate dielectric layers.
Innovation Solution
A manufacturing method for a metal gate structure that includes forming a silicon-containing work function layer with both vertical and horizontal portions within a gate trench, followed by filling the trench with a conductive metal layer, allowing for adjustment of the work function to desired values, thereby improving electrical performance without increasing gate leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If high-k gate dielectric layer is used to reduce EOT, then current leakage is reduced, but achieving optimal work function for P-type MOS becomes difficult
Solution Approach 1:
The gate structure is segmented into multiple functional layers: high-k gate dielectric layer for reducing EOT and current leakage, and a separate silicon-containing work function layer for adjusting work function. This segmentation allows each layer to independently optimize its specific function without compromising the other.
Solution Approach 2:
The gate structure uses a composite material system combining high-k dielectric material (for low leakage) with silicon-containing work function material. This composite approach enables simultaneous achievement of low current leakage through the high-k layer and optimal work function through the silicon-containing layer, resolving the contradiction between energy loss reduction and adaptability maintenance.
2Ease of manufacture
If conventional polysilicon gate is used, then manufacturing is simple, but performance is inferior due to boron penetration and depletion effect
Solution Approach 1:
The invention extracts and removes the problematic boron doping step from the gate formation process. By using a silicon-containing work function layer instead of boron-doped polysilicon, the depletion effect and boron penetration issues are eliminated while maintaining manufacturing feasibility through standard semiconductor fabrication processes.
3Length of moving object
If gate dielectric layer thickness is reduced, then device size is scaled down, but current leakage increases due to tunneling effect
Solution Approach 1:
The invention changes the material parameter (dielectric constant) from conventional silicon oxide to high-k material. This parameter change allows the gate dielectric layer to maintain reduced thickness for device scaling while the high dielectric constant compensates for the reduced thickness, preventing tunneling current and energy leakage.
Data Source
AI summary
A manufacturing method of a metal gate structure includes the following steps. First, a substrate covered by an interlayer dielectric is provided. A gate trench is formed in the interlayer dielectric, wherein a gate dielectric layer is formed in the gate trench. A silicon-containing work function layer is formed on the gate dielectric layer in the gate trench. The silicon-containing work function layer includes a vertical portion and a horizontal portion. Finally, the gate trench is filled up with a conductive metal layer.