Metal Gate Trenches for Multi-Threshold FET Integration
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Solution Overview
Problem
The increasing complexity and difficulty in reducing feature sizes and pitches in semiconductor devices, particularly in field effect transistors (FET) devices, hinder the development of high-performance and multi-functional integrated circuits (ICs) with improved integration levels.
Innovation Solution
The use of semiconductor devices with metal gates, where different metal layers are strategically positioned to provide varying threshold voltages for FET devices of the same conductivity type, allowing for the integration of devices with different functionalities without increasing process complexity, by forming specific barrier and work function metal layers in the gate trenches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature size and pitch are reduced to increase integration level, then device speed and performance are improved, but manufacturing complexity and difficulty increase
Solution Approach 1:
The patent applies local quality by forming different metal gate structures (first metal gate, second metal gate, third metal gate) in different regions of the semiconductor device. Each metal gate has different thickness and material composition tailored to specific functional requirements, allowing different threshold voltages and performance characteristics in different areas without increasing overall manufacturing complexity
Solution Approach 2:
The gate structure is segmented into multiple distinct metal layers (first metal gate, second metal gate, third metal gate) that can be independently formed and controlled. This segmentation allows each layer to be optimized for specific functions while using standardized formation processes, thereby increasing integration capability without proportionally increasing manufacturing difficulty
2Adaptability or versatility
If multiple FET devices with different threshold voltages are integrated, then multi-functionality is achieved, but device structure complexity increases
Solution Approach 1:
The patent implements universality by designing a metal gate structure where the same basic formation process can produce different threshold voltage characteristics through varying metal layer thickness and composition. The first, second, and third metal gates all follow the same formation methodology but achieve different electrical characteristics, allowing one structural approach to serve multiple functional purposes
Solution Approach 2:
The gate structure uses composite materials comprising multiple metal layers with different properties. The first metal gate, second metal gate, and third metal gate are formed as composite structures that combine different metals or metal compounds, allowing tuning of threshold voltage and other electrical parameters while maintaining a unified structural framework
Data Source
AI summary
A method for manufacturing semiconductor devices having metal gate includes follow steps. A substrate including a plurality of isolation structures is provided. A first nFET device and a second nFET device are formed on the substrate. The first nFET device includes a first gate trench and the second nFET includes a second gate trench. A third bottom barrier layer is formed in the first gate trench and a third p-work function metal layer is formed in the second gate trench, simultaneously. The third bottom barrier layer and the third p-work function metal layer include a same material. An n-work function metal layer is formed in the first gate trench and the second gate trench. The n-work function metal layer in the first gate trench directly contacts the third bottom barrier layer, and the n-work function metal layer in the second gate trench directly contacts the third p-work function metal layer.