Metal Layer Interconnect Layout to Avoid Deep Via Openings
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Solution Overview
Problem
The existing manufacturing processes for electronic devices face challenges in achieving high process yield due to the difficulty in forming openings that penetrate both the second and first insulating layers simultaneously, leading to issues like metal peeling and increased impedance or noise between metal layers.
Innovation Solution
The electronic device design includes a substrate with a first metal layer, a first insulating layer, and a second metal layer, where the second metal layer is electrically connected to the first metal layer through openings in the insulating layers, allowing for electrical connectivity without the need for deep openings that penetrate both layers simultaneously, thereby improving process yield and reducing metal peeling and impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If openings are formed to penetrate both the second insulating layer and the first insulating layer simultaneously, then electrical connectivity between metal layers is achieved, but the process yield deteriorates due to metal peeling and increased impedance
Solution Approach 1:
The patent divides the single deep opening formation process into two separate opening formation processes: first forming openings in the second insulating layer, then forming openings in the first insulating layer. This segmentation eliminates the need to form deep openings that penetrate both layers simultaneously, thereby improving process yield and reducing metal peeling issues while maintaining electrical connectivity between metal layers.
2Reliability
If deep openings penetrating both insulating layers are formed, then electrical connectivity is achieved, but metal peeling occurs reducing reliability
Solution Approach 1:
The patent segments the opening formation process into two separate stages: first forming openings in the second insulating layer to expose the second metal layer, then forming openings in the first insulating layer to expose the first metal layer. This prevents the formation of deep openings that would cause metal peeling, thereby maintaining both electrical connectivity and metal layer adhesion strength.
3Reliability
If deep openings are formed to connect metal layers, then electrical connectivity is achieved, but impedance and noise increase
Solution Approach 1:
The patent divides the opening formation into two separate processes, allowing for optimized opening dimensions at each stage. The openings in the second insulating layer and the openings in the first insulating layer can be independently designed with appropriate sizes and shapes, minimizing impedance and noise while achieving the required electrical connectivity between metal layers.
Data Source
AI summary
An electronic device and a manufacturing method thereof are provided. The electronic device includes a substrate, a first metal layer, a first insulating layer, a second metal layer, and a second insulating layer. The first metal layer is disposed on the substrate and configured to transmit a ground signal. The first insulating layer is disposed on the first metal layer and includes at least one first opening. The second metal layer is disposed on the first insulating layer and electrically connected to the first metal layer through the at least one first opening. The second insulating layer is disposed on the second metal layer and includes at least one second opening. In the top view direction, the at least one first opening is separated from the at least one second opening. The electronic device in the embodiments of the disclosure and the manufacturing method thereof may improve the process yield.