Semiconductor Package Metal Lid Faraday Shield Integration
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Solution Overview
Problem
Current semiconductor packages lack effective shielding against electromagnetic interference (EMI) and radio frequency (RF) radiation, particularly in densely packed electronic devices, as existing shielding techniques are costly, complex, and often ineffective in sharing a common ground potential with the package and PCB.
Innovation Solution
A semiconductor package design that utilizes a metal lid coupled to the leadframe to form a Faraday shield, where the lid is electrically connected to the die pad and ground connections through methods like wire bonding or bumps, establishing a common ground potential to effectively shield the active circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If external shielding cans or cages are added during board level assembly, then EMI/RF shielding is provided, but manufacturing cost increases by up to 15% and device complexity increases
Solution Approach 1:
The patent merges the shielding function with the existing package body structure by integrating a conductive shield layer directly into the package body during the molding process. This eliminates the need for separate external shielding cans or cages, thereby reducing device complexity while maintaining EMI/RF shielding effectiveness.
Solution Approach 2:
The package body is designed to serve multiple functions: it provides mechanical protection, structural support, and simultaneously acts as an EMI/RF shield through the integrated conductive layer. This multi-functionality eliminates the need for dedicated shielding components, reducing both complexity and cost.
2Object-affected harmful factors
If shielding cans or cages are added during board level assembly, then EMI/RF shielding is provided, but manufacturing cost increases by up to 15%
Solution Approach 1:
The shielding function is combined with the package body manufacturing process. The conductive shield layer is integrated into the package body during molding, allowing both components to be produced in a single process rather than requiring separate assembly steps with external shielding cans.
Solution Approach 2:
The shielding structure is prepared in advance as part of the package body during the molding process, rather than being added later during board level assembly. This preliminary integration eliminates the need for costly post-assembly shielding operations.
3Object-affected harmful factors
If conformal conductive coatings are applied to the entire package, then EMI/RF shielding is achieved, but the technique does not work with MEMS devices or those requiring external ports
Solution Approach 1:
Instead of applying conformal conductive coatings to the entire package, the patent uses a molded shield layer that can be selectively positioned and shaped. This allows the shield to cover only the necessary areas while leaving external ports and MEMS structures accessible, providing both shielding effectiveness and device versatility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design provides effective shielding against EMI and RF noise, ensuring reliable operation in high-frequency environments by placing the metal lid, die pad, and ground plane at the same electrical potential, minimizing ground bounce and electromagnetic interference.
Implementation Method 1
a metal lid coupled to one or more prescribed metal features of the leadframe of the package to form a shield that effectively surrounds the active circuitry, thus creating a type of Faraday shield
Data Source
AI summary
In accordance with the present invention, there is provided a semiconductor package wherein a metal lid of the package is used as a shield that effectively surrounds the active circuitry, and thus forms a type of Faraday shield. The lid is electrically coupled to an internal die mounting pad of either a leadframe or an alternative type of substrate. Appropriate interconnect methods between the lid, the die pad, and the ground connections exterior to the semiconductor package include, but are not restricted to, conductive adhesives, wire bonding, bumps, tabs, or similar techniques.