Self-Aligned Metal Nanodots for Memory Floating Gates

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Solution Overview

Problem

Existing techniques have not been satisfactory in providing nanodots with uniform size and alignment for use in memory devices, which are compatible with existing fabrication methods and can efficiently store charge.

Innovation Solution

A method for fabricating memory devices using self-aligned metal nanodots by applying them to a substrate via a coupling layer, utilizing polymer micelle technology to form uniform arrays of nanodots that can be used as charge-storing elements in floating gates, allowing for reduced programming voltages and scalable memory device dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional fabrication techniques are used to form nanodots, then existing manufacturing processes can be maintained, but uniform size and alignment of nanodots cannot be achieved

Engineering Contradiction:
Improveuniform size and alignment of nanodotsVSAvoidcompatibility with existing fabrication techniques
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

A coupling layer is introduced as an intermediary between the substrate and the nanodots. This coupling layer enables self-aligned formation of nanodots with uniform size and alignment while remaining compatible with conventional fabrication techniques. The coupling layer mediates the interaction between existing manufacturing processes and the new nanodot formation method, allowing both precision and ease of manufacture to be achieved.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Volume of moving object

If memory device dimensions are scaled down, then storage capacity increases, but maintaining uniform nanodot formation becomes more difficult

Engineering Contradiction:
Improvememory device dimensionsVSAvoiduniform nanodot formation
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The nanodots are formed through a self-aligned process where the coupling layer automatically positions the nanodots with uniform size and alignment. This self-service mechanism eliminates the need for additional alignment steps, making the process robust against scaling effects. As memory device dimensions are reduced, the self-aligned nature of the process maintains nanodot uniformity without requiring proportionally tighter process controls.

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If programming voltage is reduced, then power consumption decreases, but charge storage efficiency may be compromised

Engineering Contradiction:
Improvepower consumptionVSAvoidcharge storage efficiency
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The coupling layer modifies the electrical parameters at the interface between the substrate and nanodots, enabling more efficient charge transfer and storage. This parameter change allows for reduced programming voltages while maintaining charge storage efficiency. The coupling layer effectively changes the electrical characteristics of the system, permitting lower operating voltages without sacrificing reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enables the formation of uniform, self-aligned metal nanodots that efficiently store charge, reducing power consumption and enabling the scaling of memory devices to smaller dimensions while being compatible with conventional fabrication techniques.

Implementation Method 1

applying them to a substrate via a coupling layer

Methodology Applied
Scientific EffectAdsorption: Adsorption

Data Source

PatentUS7723186B2Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer
Publication Date: 2010.05.25 SANDISK TECHNOLOGIES LLC
  • US7723186B2 patent drawing
  • US7723186B2 patent drawing
  • US7723186B2 patent drawing

AI summary

Techniques are provided for fabricating memory with metal nanodots as charge-storing elements. In an example approach, a coupling layer such as an amino functional silane group is provided on a gate oxide layer on a substrate. The substrate is dip coated in a colloidal solution having metal nanodots, causing the nanodots to attach to sites in the coupling layer. The coupling layer is then dissolved such as by rinsing or nitrogen blow drying, leaving the nanodots on the gate oxide layer. The nanodots react with the coupling layer and become negatively charged and arranged in a uniform monolayer, repelling a deposition of an additional monolayer of nanodots. In a configuration using a control gate over a high-k dielectric floating gate which includes the nanodots, the control gates may be separated by etching while the floating gate dielectric extends uninterrupted since the nanodots are electrically isolated from one another.