Nanoinformatics TRIZ Cases

Segmented nanowires resolve the transparency-performance trade-off, enabling brighter displays.

Rhombus fins and SiGe quantum wells suppress short channel effects while boosting carrier mobility.

Standard cell layouts with overlapping local interconnects reduce density unevenness and improve performance predictability in semiconductor devices.

A self-aligned zero-via layer positions conductors orthogonal to metal levels, enabling reliable connections between transistor source/drain regions and resistive memory elements.

Graphene caps act as a heat sink and structural stabilizer for AlGaN/GaN transistors, preventing cracking during high power operation.

Direct synthesis of iron triazole nanoparticles enables reversible spin state changes without grinding.

Segmenting the nitride layer into distinct stoichiometric sub-layers reduces leakage current and extends device lifetime.

Adding an organic enhancer to the electrolyte increases metal nuclei density and repeatability, resolving low sensitivity in nanowire sensors.

A wrap-around bottom dielectric isolation structure eliminates parasitic capacitance caused by unintentional recess in shallow trench isolation regions.

A quantum well structure confines free atoms and ions through contact-less interaction with sub-nanometer precision.

A coupling layer forms uniform metal nanodot monolayers on gate oxides, reducing programming voltages while maintaining fabrication compatibility.

An insulating channel reduces fabrication difficulty for sub-100nm devices while enabling efficient current modulation at lower voltages.

Solution-based zinc oxide films enable low-temperature fabrication of thin film transistors on plastic substrates.

Cyclical deposition deposits a threshold voltage shifting layer to resolve gate leakage current while maintaining minimal equivalent oxide thickness.

A singlet fission host material doped with a triplet forming dopant generates multiple excitons upon light absorption.

Flexo printing deposits polymer-solvent solutions onto porous substrates to create precise liquid flow channels.

Self-assembled metal nano-crystals on polyelectrolyte films form a multi-layered charge trap structure.

A reflective EUV mask uses laser irradiation to thermally treat molybdenum and silicon layers for precise reflectivity control.

A tin oxide film with controlled oxygen to tin atomic ratio serves as a light absorbing layer in reflective photomasks.

A reflective EUV mask uses a light scattering crystalline portion in the peripheral region to decrease reflectivity.

Segmented MRAM blocks with common word lines suppress parallel currents in non-selected cells, improving read data reliability.

Carbon nanotubes bridge conductive layers in a vertical stack, enabling localized resistance control that improves integration density and reliability.

A molecular compound links phosphorescent and fluorescent units to enable efficient energy transfer in organic light-emitting devices.

An insulation layer pattern separates source-drain regions from the gate electrode in a gate-all-around device, minimizing gate induced drain leakage.

Patterned apertures in dielectric layers control nanowire position and orientation, eliminating catalyst-induced crystalline defects.

Shield magnetic bodies counteract external magnetic fields to prevent data corruption in magnetoresistive random access memory.

A buffer layer protects the active layer during nanowire network deposition.

A nanowire field effect transistor fabrication method uses epitaxial growth to deposit distinct semiconductor materials within defined cavity regions.

A multi-agent plasma selectively removes germanium layers while depositing a protective nitride film on adjacent silicon surfaces.

An electron injector modulates quantum dot charge states to achieve over 10% refractive index variation in non-absorption regions without continuous voltage.

A TiO2-SiO2 substrate maintains dimensional stability during extreme ultraviolet exposure.

Atomic-layer deposition creates sub-10 nm fins from two-dimensional semiconductors, resolving lithography limits while maintaining electrical properties.

Ambipolar vertical field effect transistors use phase segregation to form percolating pathways for high mobility charge transport.

Incorporating titanium metal sites into dielectric charge-trapping materials reduces programming and erase voltages for scaled memory cells.

A single-gated feedback field-effect transistor generates spike voltage through a positive feedback loop for integrate-and-fire neuron circuits.

Unsymmetric phthalocyanine compounds enable two-photon absorption for rewritable optical data storage.

Gate capping liner with horizontal and vertical portions defines a recess filled by a film to enhance current control in semiconductor devices.

Recessed source/drain capping layers with pointed portions minimize epitaxial growth defects while lowering contact resistivity in nanosheet FETs.

A semiconductor device with a source/drain contact featuring a contact silicide film and silicon germanium layers.