Metal Pillar PoP Packaging for Integration Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in achieving denser integration of electronic components due to the need for smaller packages that utilize less area, and existing Package on Package (PoP) technologies require improved packaging techniques to enhance integration density and reliability.
Innovation Solution
The use of novel metal pillars formed through a two-step plating process, which are shaped to facilitate efficient attachment of solder balls, providing structural strength, improved mechanical resistance, and reduced thermal stress, while allowing for finer pitch packaging and reduced defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional PoP packaging techniques are used, then integration density can be improved, but package area utilization and manufacturing complexity increase
Solution Approach 1:
The patent implements Package on Package (PoP) technology by nesting a first packaged die and a second packaged die vertically, where the second die is attached to the first die through metal pillars and solder balls. This three-dimensional stacking arrangement allows multiple functional units to be integrated within a compact footprint, effectively increasing integration density while minimizing the overall package area occupied on the substrate.
2Quantity of substance
If traditional PoP packaging techniques are used, then integration density can be improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent employs preliminary action by pre-forming metal pillars on the first packaged die before attaching the second packaged die. These metal pillars are created through a two-step plating process (electroless copper plating followed by electroplating) and are prepared in advance with proper height, diameter, and spherical top geometry. This preliminary preparation simplifies the subsequent assembly process, reduces manufacturing complexity, and ensures precise alignment and reliable electrical connections between stacked packages.
3Area of stationary object
If smaller packages are used to reduce area, then area utilization improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes parameter changes by carefully controlling the dimensions and geometry of metal pillars throughout the manufacturing process. The pillars are designed with specific height-to-diameter ratios and spherical tops to facilitate precise alignment and reliable solder ball attachment. By optimizing these geometric parameters, the patent achieves high packaging precision in compact PoP structures, enabling smaller package footprints while maintaining manufacturing feasibility and connection reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables improved package coplanarity, reduced thermal budget, and enhanced reliability with lower manufacturing costs and safer working conditions, resulting in more reliable and cost-effective PoP packages with increased integration density.
Implementation Method 1
A two-step plating process is used to form the metal pillars
Data Source
AI summary
A method of packaging semiconductor dies may include: coupling a first die to a first substrate; forming a plurality of first portions of a plurality of metal pillars on a surface of the first substrate; forming a second portion of the plurality of metal pillars over each of the plurality of first portions of the plurality of metal pillars; forming a protection layer over sidewalls of each of the plurality of first portions and second portions of the plurality of metal pillars; coupling a second die to a second substrate; and coupling the plurality of metal pillars to the second substrate.


