Metal-Semiconductor Wafer Bonding for High-Q RF Capacitors

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Solution Overview

Problem

Conventional Metal-Insulator-Metal (MIM) devices have quality factor (Q) limits due to high equivalent series resistance (ESR) from thick metal plates, which restricts their performance in radio frequency (RF) circuits and increases power consumption.

Innovation Solution

The method involves forming a capacitor with a CMOS-compatible intermetallic bonding layer using thermo compression bonding between a metal plate and a dielectric layer on a silicon substrate, where the silicon substrate is doped to create an extrinsic semiconductor layer, reducing ESR and enhancing the quality factor (Q) without using organic bonding agents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If thick metal plates are used in conventional MIM devices, then structural strength and plate formation are improved, but equivalent series resistance increases and quality factor decreases

Engineering Contradiction:
Improvestructural strengthVSAvoidquality factor
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent changes the material parameter from conventional metal to intrinsic semiconductor (such as silicon or germanium), fundamentally altering the electrical properties. This material substitution reduces equivalent series resistance while maintaining structural integrity, thereby improving quality factor without sacrificing structural strength

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention creates a composite structure combining intrinsic semiconductor layers with metal plates, forming a metal-semiconductor-metal capacitor. This composite approach leverages the mechanical strength of metals while utilizing the low-resistance properties of intrinsic semiconductors, resolving the contradiction between structural strength and electrical performance

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional MIM devices are used in RF circuits, then device fabrication is simplified, but performance is restrained and power consumption increases

Engineering Contradiction:
Improvedevice fabricationVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The patent modifies the dielectric layer parameter from conventional insulator to intrinsic semiconductor, which reduces resistive losses and power consumption in RF applications. The intrinsic semiconductor's lower loss tangent compared to conventional insulators directly addresses the power consumption issue while maintaining fabrication compatibility

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention replaces the conventional insulator material system with an intrinsic semiconductor material system, substituting materials with fundamentally different electrical properties. This substitution reduces energy loss and power consumption while preserving the ease of manufacture through standard semiconductor fabrication processes

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a high-quality factor capacitor with lower resistance, improved performance, and reduced power consumption, suitable for integration in RF circuits and mobile devices, offering better reliability and fabrication ease compared to conventional methods.

Implementation Method 1

The first plate is bonded to the dielectric layer with an intermetallic layer using thermo compression

Methodology Applied
Scientific EffectThermo compression bonding:

Implementation Method 2

The silicon substrate is doped to form an extrinsic semiconductor layer

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS9431510B2Metal-semiconductor wafer bonding for high-Q devices
Publication Date: 2016.08.30 QUALCOMM INC
  • US9431510B2 patent drawing
  • US9431510B2 patent drawing
  • US9431510B2 patent drawing

AI summary

Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.