Semiconductor Metallization Support Structures for Stress Relief
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing density of conductive lines and devices in semiconductor metallization layers leads to physical stresses, causing warping, delamination, and reliability issues in semiconductor devices, especially when the semiconductor wafer is thinned.
Innovation Solution
The formation of support structures within the metallization layers, including anchor structures and varying widths of support structures across different layers, to provide structural rigidity and alleviate stress caused by density variations, allowing for thinner semiconductor wafers without compromising reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the density of conductive lines and conducting devices in metallization layers is increased to accommodate higher semiconductor device density, then productivity and device integration are improved, but physical stresses increase causing warping, delamination, and reliability issues
Solution Approach 1:
The patent applies local quality by creating support structures with varying densities and configurations in different regions of the metallization layers. These support structures are strategically placed in areas experiencing higher stress concentrations, providing localized reinforcement without increasing overall metal density. This allows high device density in functional areas while maintaining structural integrity in stress-prone regions.
Solution Approach 2:
The patent employs composite material structures by combining conductive metal layers with support structures made of different materials (such as dielectric materials or metal alloys with different thermal expansion coefficients). This composite approach creates a metallization system that maintains both electrical functionality and mechanical stability, resolving the contradiction between high density and stress resistance.
2Volume of moving object
If the semiconductor wafer is thinned to reduce device size and improve packaging, then device footprint is reduced, but the wafer becomes more susceptible to flexing, warping, and delamination
Solution Approach 1:
The patent applies segmentation by dividing the thinned semiconductor wafer into multiple supported regions through the introduction of support structures within the metallization layers. These support structures act as internal reinforcement elements that segment the wafer into smaller, more stable zones, preventing overall flexing and warping while maintaining the thinned profile. The support structures are distributed throughout the wafer thickness to provide continuous reinforcement.
Solution Approach 2:
The patent addresses the thickness limitation by introducing support structures that extend into the vertical dimension within the metallization layers. Instead of simply thinning the wafer in one dimension, the solution adds structural complexity in the vertical dimension through multi-layer support structures, effectively compensating for the reduced thickness without increasing the wafer's external dimensions.
3Reliability
If support structures are added to the metallization layers to relieve stresses, then reliability is improved, but device complexity and manufacturing steps increase
Solution Approach 1:
The patent applies merging by combining the support structure formation process with existing metallization fabrication steps. The support structures are formed using the same deposition, etching, and planarization processes already employed for creating conductive lines and devices. This integration eliminates the need for separate support structure fabrication steps, reducing manufacturing complexity while maintaining the stress-relief functionality.
Solution Approach 2:
The patent employs universality by designing support structures that serve multiple functions: providing mechanical support to prevent warping, acting as stress relief elements, and potentially serving as additional conductive paths or grounding structures. This multi-functionality reduces the need for separate dedicated support structures, simplifying the overall device architecture while achieving reliability improvements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The support structures effectively mitigate stress-induced warping and delamination, enhancing the reliability and structural integrity of thinned semiconductor dies, enabling higher memory cell densities and efficient packaging in standardized form factors.
Implementation Method 1
The support structures can be formed in any of the metallization layers M1-M7 or insulating layers I1-I8... The support structures 406A-D provide lateral support to substantially prevent the curving, bending stresses
Implementation Method 2
When the support structure is formed in at least two layers of the electrical interconnect structure an anchor structure can be formed through any intervening layers between the at least two layers to connect the portions of the support structure
Data Source
AI summary
A system, method and apparatus for making a semiconductor die includes forming multiple semiconductor devices in a respective portion of a semiconductor wafer. An electrical interconnect structure is formed over the semiconductor devices and provide electrical connections to the semiconductor devices. The electrical interconnect structure including one or more metallization layers. Each of the metallization layers includes conductive lines. At least one portion of at least one of the metallization layers includes a density of the conductive lines that varies as compared to the other portions of the metallization layers. At least one support structure is formed in the electrical interconnect structure. The semiconductor wafer can be a thinned semiconductor wafer.