Methanol Plasma Sputter Etching for Copper Interconnect Liner Coverage
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Solution Overview
Problem
Conventional damascene processing for copper interconnects in integrated circuits is not compatible with modern CMOS technology's smaller feature sizes, leading to poor liner/seed coverage, voids, defects, and increased resistivity due to pinch off, reentrant reactive ion etching profiles, and poor adhesion.
Innovation Solution
A method involving sputter etching using a methanol plasma to form conductive lines in a multi-layer structure, followed by forming a liner and depositing a dielectric layer, which maximizes metal grain growth and minimizes resistivity, allowing for flexible liner materials and reducing low-k/ultra-low-k damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional damascene processing is used for copper interconnects, then the process is simple and well-established, but it results in poor liner/seed coverage, voids, defects, and increased resistivity when applied to modern CMOS technology with smaller feature sizes and higher aspect ratios
Solution Approach 1:
The patent changes the etching parameters by using sputter etching with methanol plasma instead of conventional reactive ion etching. This parameter change enables better liner/seed coverage on trench walls by achieving more uniform etching profiles and avoiding the pinch-off and reentrant profile problems that occur with conventional RIE processes at small feature sizes and high aspect ratios
Solution Approach 2:
The patent replaces the chemical-based reactive ion etching process with a physical sputter etching process using methanol plasma. This substitution eliminates the chemical reactions that cause non-uniform etching and poor liner coverage, while the physical sputtering mechanism provides more controlled and uniform material removal that maintains adhesion and coverage quality
2Productivity
If conventional reactive ion etching is used, then the etching process is fast and efficient, but it creates pinch off and reentrant profiles that lead to voids and poor adhesion in narrow trenches
Solution Approach 1:
The patent replaces chemical reactive ion etching with physical sputter etching using methanol plasma. This substitution maintains high etching efficiency while eliminating the chemical reactions that cause pinch-off and reentrant profiles. The physical sputtering mechanism provides uniform ion bombardment that creates straight, clean trench walls without the profile distortion problems of conventional RIE
3Length of moving object
If copper lines are made narrower to meet modern CMOS requirements, then the feature size is reduced, but the copper resistivity increases due to liner thickness, grain size, and scattering phenomena
Solution Approach 1:
The patent changes the etching process parameters to achieve better copper grain growth and reduced scattering. The sputter etching with methanol plasma creates cleaner surfaces and more uniform grain structures in the copper lines, reducing grain boundary scattering and surface scattering effects that increase resistivity in narrow lines
Solution Approach 2:
The patent replaces chemical etching with physical sputter etching, which creates cleaner copper surfaces with fewer defects and better grain growth characteristics. This substitution reduces surface scattering and grain boundary scattering effects, thereby maintaining lower resistivity even as line widths are reduced to meet modern CMOS scaling requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the fabrication of CMOS devices with small feature sizes, minimizing voids and defects, maintaining conductivity, and reducing resistivity, while allowing for flexible liner choices and minimizing damage to ultra-low-k dielectric materials.
Implementation Method 1
sputter etching the layer of conductive metal using a methanol plasma
Implementation Method 2
sputter etching the layer of conductive metal using a methanol plasma
Data Source
AI summary
In one embodiment, fabricating conductive lines in an integrated circuit includes providing a layer of conductive metal in a multi-layer structure fabricated upon a wafer and sputter etching the conductive metal using methanol plasma, wherein a portion of the conductive metal that remains after the sputter etching forms the conductive lines. In another embodiment, fabricating conductive lines in an integrated circuit includes providing a layer of conductive metal in a multi-layer structure fabricated upon a wafer, wherein the layer of conductive metal is an intermediate layer in the multi-layer structure, etching the multi-layer structure to expose the conductive metal, sputter etching conductive metal using methanol plasma, wherein a portion of the conductive metal that remains after the sputter etching forms the conductive lines, forming a liner that surrounds the conductive lines, subsequent to the sputter etching, and depositing a dielectric layer on the multi-layer structure.