Semiconductor Memory Device MIC Polysilicon Channel
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in improving the reliability of memory cell transistors due to the small particle size of polysilicon semiconductor layers, leading to decreased carrier mobility and variations in cell currents, which affect the S value and overall transistor properties.
Innovation Solution
The configuration includes insulating layers and semiconductor layers in active areas to form channels with a thin thickness, using materials like metal sulfides or polysilicon formed by metal-induced crystallization (MIC) methods to enhance carrier mobility and reduce crystal grain boundaries, and replacing the semiconductor layer with an insulating layer to improve interface state density and crystal orientation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If polysilicon semiconductor layers with small particle size are used, then device integration density is improved, but carrier mobility decreases and variations in cell currents increase
Solution Approach 1:
The patent changes the physical and chemical parameters of the semiconductor layer by transitioning from conventional polysilicon to metal-induced crystallization (MIC) polysilicon or monocrystalline semiconductor materials. This parameter change increases carrier mobility while maintaining the thin film structure needed for high integration density, thereby resolving the contradiction between density and reliability.
Solution Approach 2:
The patent employs composite material structures including multiple insulating layers (tunnel insulating layer, charge trapping layer, block insulating layer) combined with MIC polysilicon or monocrystalline semiconductor layers. This composite approach enables simultaneous achievement of high carrier mobility in the semiconductor layer and proper charge storage functionality in the insulating layers, addressing the reliability issue while maintaining integration density.
2Quantity of substance
If polysilicon semiconductor layers with small particle size are used, then device integration density is improved, but variations in cell currents increase affecting S value
Solution Approach 1:
The patent changes the crystalline structure parameter of the semiconductor layer from polycrystalline to MIC polysilicon or monocrystalline, which reduces crystal grain boundaries and improves the uniformity of cell currents. This parameter change maintains thin film thickness for high integration density while stabilizing electrical characteristics.
Solution Approach 2:
The patent uses MIC polysilicon or monocrystalline semiconductor layers that replicate the desirable electrical properties of bulk crystalline materials in thin film form. This copying of crystalline structure benefits enables uniform cell currents while maintaining the thin film geometry required for high integration density.
3Reliability
If insulating layers are added between semiconductor layers and charge storage layer, then interface state density is improved, but device structure complexity increases
Solution Approach 1:
The patent implements insulating layers that serve multiple functions: they act as tunnel insulating layers for charge injection, charge trapping layers for data storage, and block insulating layers for charge confinement. This multi-functionality improves interface state density and reliability while minimizing the increase in structural complexity by combining multiple functions into a unified layered architecture.
Solution Approach 2:
The insulating layers serve as intermediary layers between the semiconductor channel and the charge storage function. These intermediary layers (tunnel insulating layer, charge trapping layer, block insulating layer) mediate the interaction between electrons and the storage mechanism, improving interface quality and reducing interface states while maintaining a manageable structural complexity through systematic layering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the reliability of semiconductor memory devices by enhancing carrier mobility, reducing interface state density, and stabilizing the S value, resulting in better transistor properties and memory cell performance.
Implementation Method 1
polysilicon formed by metal-induced crystallization (MIC) methods
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes: a first semiconductor layer; first and second insulating layers in contact with the first semiconductor layer; a second semiconductor layer in contact with the first insulating layer; a third semiconductor layer in contact with the second insulating layer; a first conductor; a third insulating layer in contact with the first conductor; a fourth insulating layer provided between the second semiconductor layer and the third insulating layer; a first charge storage layer provided between the second semiconductor layer and the fourth insulating layer; and a fifth insulating layer provided between the second semiconductor layer and the first charge storage layer. The second semiconductor layer, the first conductor, the third to fifth insulating layers, and the first charge storage layer function as a first memory cell.