Micro-LED Diode Array Current Limiting for Higher EQE

The patent applies local quality by forming current limiting regions with different doping concentrations and properties at different locations within the LED chip. Specifically, the first current limiting region is formed in the active layer and the second current limiting region is formed in the cladding layer, with each region having tailored doping concentrations to optimize local current distribution and reduce non-radiative recombination at sidewalls and surfaces, thereby improving overall external quantum efficiency while maintaining reduced chip size.

The patent applies segmentation by dividing the LED chip structure into distinct functional regions with current limiting areas formed in both the active layer and cladding layer. This segmented approach allows for optimized current distribution across different parts of the chip, improving uniformity and reducing defects, which in turn facilitates more efficient mass transfer processes and reduces the need for expensive high-accuracy equipment by making the chips more robust to transfer variations.

The patent applies preliminary action by forming current limiting regions in both the active layer and cladding layer during the manufacturing process itself. This preliminary structuring of current distribution pathways prevents defects and ensures uniform current flow before the chips undergo inspection and transfer, thereby reducing the need for extensive inspection and repair processes later, saving time and reducing production complexity.