Micro-LED Chip Structure With Overhanging Emission Layer Edges

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current micro-LED structures face inefficiencies due to surface recombination carrier loss when the light emitting layer aligns with the edges of the conductive layers, leading to reduced light emission efficiency.

Innovation Solution

The micro-LED structure design includes a light emitting layer that extends horizontally away from the edges of the conductive layers, preventing contact and minimizing surface recombination, with additional features like spacers and isolation structures to enhance performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the light emitting layer aligns with the edges of the conductive layers, then the device structure is simpler, but surface recombination carrier loss increases and light emission efficiency decreases

Engineering Contradiction:
Improvestructure simplicityVSAvoidsurface recombination carrier loss
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The light emitting layer is designed with an asymmetric configuration relative to the conductive layers. Specifically, the light emitting layer extends beyond the top edge of the first conductive layer and the bottom edge of the second conductive layer, creating an overhang structure. This asymmetric design prevents the light emitting layer edges from contacting the conductive layer edges, thereby reducing surface recombination and carrier loss while maintaining manufacturing feasibility.

Inventive Principle:
Principle #4Asymmetry

2Loss of energy

If the light emitting layer extends away from the conductive layer edges, then light emission efficiency improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvelight emission efficiencyVSAvoidalignment precision
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The patent employs a multi-layer stack structure where the light emitting layer is positioned between the first and second conductive layers. The extending configuration of the light emitting layer beyond the conductive layer edges is established during the fabrication process, creating a built-in geometric constraint that prevents edge contact. This preliminary structural arrangement ensures reduced surface recombination without requiring ultra-precise alignment during subsequent manufacturing steps.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves light emission efficiency by reducing surface recombination and optimizing carrier injection, resulting in enhanced performance and reliability of the micro-LEDs.

Implementation Method 1

A micro-light emitting diode (micro-LED) is a device that emits light using an electric signal

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS12094915B2Micro-LED structure and micro-LED chip including same
Publication Date: 2024.09.17 JADE BIRD DISPLAY (SHANGHAI) LTD
  • US12094915B2 patent drawing
  • US12094915B2 patent drawing
  • US12094915B2 patent drawing

AI summary

A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer extends along a horizontal level from a top edge of the first type conductive layer and a bottom edge of the second type conductive layer. The micro-LED chip further includes a metal layer formed on a portion of the light emitting layer that extends from the top edge of the first type conductive layer.