Micro-LED Semiconductor Device With Inclined Surface Recess

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Solution Overview

Problem

Micro-sized light-emitting diodes are susceptible to external impacts and difficult to selectively separate from a wafer, often resulting in defects due to particles remaining during the separation process.

Innovation Solution

A semiconductor device with a specific structure including a first and second semiconductor layer, an active layer, and electrodes, featuring an inclined surface and a recess with controlled etching rates to enhance robustness and prevent particle occurrence during separation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If micro-sized light-emitting diodes are manufactured, then energy efficiency and luminance are improved, but susceptibility to external impacts increases

Engineering Contradiction:
Improveenergy efficiencyVSAvoidsusceptibility to external impacts
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The semiconductor layer is divided into multiple sub-semiconductor layers (first, second, third sub-semiconductor layers) with different etching rates. This segmentation allows selective removal of specific layers during separation processes, enabling clean detachment of micro-sized LEDs from the wafer while maintaining structural integrity and reducing susceptibility to external impacts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the semiconductor structure have different etching rates, creating local quality variations. The first sub-semiconductor layer has a higher etching rate than the second and third layers, allowing selective etching at specific locations. This enables precise control over the separation process, improving reliability during transfer operations.

Inventive Principle:
Principle #3Local quality

2Volume of moving object

If micro-sized light-emitting diodes are manufactured, then device miniaturization is achieved, but difficulty in selective separation from wafer increases

Engineering Contradiction:
Improvedevice sizeVSAvoidselective separation difficulty
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The semiconductor structure is pre-configured with multiple sub-layers having different etching rates before the separation process. This preliminary arrangement of layers with varying etching characteristics enables selective removal of the first sub-semiconductor layer during separation, facilitating easy and clean detachment of miniaturized LEDs from the wafer without causing particle contamination.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If separation process is performed on micro-sized LEDs, then transfer to another substrate is enabled, but particle contamination occurs

Engineering Contradiction:
Improvetransfer capabilityVSAvoidparticle contamination
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The first sub-semiconductor layer is selectively extracted or removed from the semiconductor structure through controlled etching processes. This extraction creates a clean separation interface, allowing micro-sized LEDs to be transferred to another substrate without generating particles from the separation process, thus eliminating contamination while maintaining transfer capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11398581B2Semiconductor device
Publication Date: 2022.07.26 LG INNOTEK CO LTD
  • US11398581B2 patent drawing
  • US11398581B2 patent drawing
  • US11398581B2 patent drawing

AI summary

Disclosed is a semiconductor device including a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer, a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer. The semiconductor structure includes a first upper surface on which the first semiconductor layer is exposed, a second upper surface on which the second semiconductor layer is disposed, an inclined surface connecting the first upper surface and the second upper surface, and a recess formed between the first upper surface and the inclined surface. The recess has a depth less than or equal to 30% of a vertical distance between the first upper surface and the second upper surface.