Micro LED Sloped Sidewall Carrier Confinement
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Solution Overview
Problem
Inorganic semiconductor-based LEDs face efficiency losses due to defects at the etch sidewalls, leading to non-radiative carrier recombination and leakage currents, which are difficult to address with existing passivation methods, especially in micro-LEDs where device dimensions and drive currents are smaller, resulting in reduced luminous efficacy and increased manufacturing complexity.
Innovation Solution
The use of patterned substrates with epitaxial layers and sloped sidewalls, where the p-layer is thicker than the sidewalls, and the n-layer is thinner, creating an energy barrier that confines carriers to the flat regions, reducing parasitic hole leakage and enhancing electrical resistance, allowing for efficient carrier transport and reduced sidewall recombination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional LEDs with vertical sidewalls are used, then manufacturing is simpler, but carrier leakage occurs at sidewalls reducing efficiency
Solution Approach 1:
The patent applies asymmetry by transitioning from vertical sidewalls to sloped sidewalls with specific angles (30-60 degrees). This asymmetric geometry creates an energy barrier that confines carriers to the active region, preventing leakage while maintaining manufacturing feasibility through controlled epitaxial growth processes.
Solution Approach 2:
The patent implements local quality by varying the thickness of the p-layer across different regions of the device. The p-layer is thicker in flat regions and thinner in sidewall regions, creating localized electrical resistance variations that guide carrier flow and prevent leakage at critical sidewall interfaces.
2Productivity
If device dimensions are reduced for micro-LEDs, then integration density increases, but sidewall defects become more dominant reducing luminous efficacy
Solution Approach 1:
The patent changes geometric parameters by introducing sloped sidewalls with specific angle ranges (30-60 degrees) and controlling the thickness ratios between flat regions and sidewalls. These parameter changes create an energy barrier effect that becomes increasingly effective at smaller dimensions, allowing micro-LEDs to maintain high efficiency despite reduced size and increased sidewall-to-area ratio.
3Reliability
If passivation methods are applied to etch sidewalls, then sidewall damage is reduced, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies preliminary action by designing the sloped sidewall geometry and p-layer thickness distribution into the epitaxial growth process itself, rather than requiring post-growth passivation steps. This preventive design approach inherently protects against carrier leakage without adding complex subsequent manufacturing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the energy bandgap in the sidewall region, blocking parasitic hole currents and confining forward bias hole injection to the flat regions, resulting in greater than 90% confinement, thereby enhancing the luminous efficacy and reducing manufacturing complexity and cost.
Implementation Method 1
creating an energy barrier that confines carriers to the flat regions, reducing parasitic hole leakage
Implementation Method 2
enhancing electrical resistance, allowing for efficient carrier transport and reduced sidewall recombination
Implementation Method 3
Light emitting diodes (LEDs) have emerged as an appealing light source
Data Source
AI summary
Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.