Micro-link Chip-to-Chip Bus Impedance Distribution
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Solution Overview
Problem
Existing inter-chip communication channels in chip packages face limitations in bandwidth and latency due to the increasing number of signal lines and corresponding return paths, constraining performance as they approach physical limits.
Innovation Solution
A micro-link with more signal lines than return paths and a short length, which results in a distribution of impedance values, allowing multiple reflections to reach a substantial fraction of a steady-state value within a symbol time, facilitating high-bandwidth and low-latency communication between components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of signal lines is increased to achieve high-bandwidth communication, then communication bandwidth is improved, but the number of return paths also increases which approaches physical limits and constrains further bandwidth scaling
Solution Approach 1:
Multiple signal lines share common return paths through shared reference planes, merging previously separate return path functions into common structures. This reduces the total number of return paths needed while maintaining signal integrity for multiple communication channels.
Solution Approach 2:
Return paths serve multiple signal lines simultaneously through the shared reference plane structure, making each return path universal rather than dedicated to a single signal line. This multi-functionality increases bandwidth capacity without proportionally increasing return path count.
2Productivity
If more signal lines and return paths are added to increase bandwidth, then communication capacity is improved, but latency increases and performance decreases
Solution Approach 1:
The patent transitions from planar 2D routing to 3D vertical stacking with multiple signal layers connected through vias. This dimensional change allows signal lines to be arranged in three-dimensional space, increasing bandwidth capacity without proportionally increasing signal path length and latency.
3Quantity of substance
If the micro-link includes more signal lines than return paths with short length, then signal density is maximized, but impedance distribution becomes non-uniform causing multiple reflections
Solution Approach 1:
The patent deliberately designs for non-uniform impedance distribution along the transmission line rather than maintaining constant impedance. By changing the impedance parameter profile and accepting reflections, the design achieves higher signal density while managing signal integrity through controlled impedance transitions.
Data Source
AI summary
A chip package includes a micro-link between components disposed on a substrate. The micro-link may be an ultra-short multi-conductor transmission line with shared reference planes that results in a distribution of impedance values. Furthermore, the composite signal traces in the transmission line each can support communication of one symbol at a time by ensuring that multiple reflections reach a substantial fraction of a steady-state value within a symbol time. In this way, the micro-link may facilitate continued scaling of the communication bandwidth between the components with low latency to increase the performance of computer systems that include the chip package.