Microchip Spacer for Leakage Current Mitigation
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Solution Overview
Problem
Lead frame packaging of microchips often experiences unintended current leakage between adjacent chips due to non-uniform die attach material thickness and voids, which can lead to device malfunction and increased production costs with complex split paddle designs.
Innovation Solution
A packaged microchip design incorporating a spacer made from insulative material, such as polyimide tape, to prevent leakage currents between microchips, allowing for standard lead frames to be used across various microchip sizes without custom designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If die attach material is used to attach microchips to the paddle, then the microchips can be securely mounted, but the non-uniform thickness and voids in the die attach material cause electrical leakage between adjacent microchips
Solution Approach 1:
The patent introduces a spacer as an intermediary component between the microchips and the paddle. This spacer provides a uniform insulating barrier that prevents electrical leakage while still allowing secure mechanical mounting. The spacer acts as a mediator that decouples the mechanical support function (performed by the paddle) from the electrical isolation function (performed by the spacer), thereby resolving the contradiction between mounting security and electrical isolation reliability.
Solution Approach 2:
The patent segments the electrical isolation function from the mechanical support function by introducing a separate spacer component. Instead of relying on the die attach material to perform both functions simultaneously (which leads to the contradiction), the isolation function is segmented into a dedicated spacer layer, allowing each component to optimize its specific function without compromising the other.
2Reliability
If split paddles are used to isolate microchips, then electrical leakage between chips is substantially eliminated, but the production complexity and cost increase due to custom etching requirements
Solution Approach 1:
The spacer serves as an intermediary insulating component that eliminates the need for complex split paddle designs. By placing the isolation function in the spacer layer, the lead frame can remain simple and standardized, reducing manufacturing complexity while maintaining reliable electrical isolation between adjacent microchips.
Solution Approach 2:
The patent applies local quality by providing electrical isolation specifically where needed (between adjacent microchips) through the spacer, rather than requiring the entire lead frame structure to be complex and segmented. This allows the use of simple, standardized lead frames with uniform properties, reducing overall device complexity while maintaining local isolation reliability.
3Power
If larger voltage potentials are applied to microchips, then the electrical performance and functionality improve, but the risk of arcing and leakage currents between adjacent microchips increases
Solution Approach 1:
The spacer acts as an intermediary insulating barrier that enables higher voltage operation by preventing direct electrical breakdown between adjacent microchips. The uniform thickness and appropriate material properties of the spacer provide consistent electrical isolation that can withstand high voltage potentials, allowing the system to operate at higher power levels without the harmful effects of arcing or leakage currents.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The spacer effectively isolates microchips, eliminating the need for costly split paddle designs and ensuring reliable operation across different voltage potentials, while enabling the use of standard assembly tools and lead frames for multiple microchip packages.
Implementation Method 1
The at least one spacer is configured to substantially prevent leakage current between the first and second microchips
Data Source
AI summary
A packaged microchip has a base, at least one spacer coupled to the base, and first and second microchips mounted to the at least one spacer. The at least one spacer is configured to substantially prevent leakage current between the first and second microchips.